Two-level Logic Design

Two-Level Logic Design is a combinational logic synthesis methodology that belongs to the class of logic optimization techniques and is distinguished by its restriction to two hierarchical levels of logic gates, typically sum-of-products or product-of-sums forms, to implement Boolean functions with minimized literal counts.

Publications

3.3K

Citations

160

Authors

Institutions

Publications per year

2017–2026

Parents

Combinational Logic Description

Publications

NOVA: state assignment of finite state machines for optimal two-level logic implementation

Tiziano Villa, Alberto Sangiovanni‐Vincentelli · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1990 · 341 citations

Engineering, Computer Engineering, Computer Science +17

On variable ordering of binary decision diagrams for the application of multi-level logic synthesis

Masahiro Fujita, Yusuke Matsunaga, Taeko Kakuda · European Design Automation Conference · 1991 · 201 citations

Engineering, Computer Engineering, Computer Science +16

Two-level logic minimization: an overview

Olivier Coudert · Integration · 1994 · 185 citations

Engineering, Computer Engineering, Computer Science +11

Characterization, test, and logic synthesis of and-or-inverter (AOI) gate design for QCA implementation

M. Momenzadeh, Jing Huang, Mehdi B. Tahoori et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2005 · 141 citations

Engineering, Computer Engineering, Electrical Engineering +15

On variable ordering of binary decision diagrams for the application of multi-level logic synthesis

Masahiro Fujita, Yusuke Matsunaga, Taeko Kakuda · 2002 · 124 citations

Engineering, Computer Engineering, Computer Science +16

1–5 of 83

Authors

160

AS
Alberto Sangiovanni‐Vincentelli
University of California, Berkeley, United States
8 publications · 690 citations
8
h-index
SM
Steven M. Nowick
Columbia University, United States
5 publications · 82 citations
5
h-index
DK
Dariusz Kania
Silesian University of Technology, Poland
5 publications · 122 citations
5
h-index
TV
Tiziano Villa
University of California, Berkeley, United States
4 publications · 582 citations
4
h-index
AR
A. Richard Newton
University of California, Berkeley, United States
3 publications · 80 citations
3
h-index

1–5 of 160

Institutions

1–8 of 85

Venues

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
13 publications · 900 citations
13
h-index
IEEE Transactions on Computers
9 publications · 212 citations
9
h-index
IEE Proceedings E Computers and Digital Techniques
2 publications · 43 citations
2
h-index
Transactions of the American Institute of Electrical Engineers Part I Communication and Electronics
1 publications · 10 citations
1
h-index
International Conference on Computer Aided Design
Conference · 1 publications · 25 citations
1
h-index

1–5