Transaction-level Power Estimation

Transaction-Level Power Estimation is a modeling methodology in power estimation that belongs to the class of abstraction-level techniques and is distinguished by its focus on estimating power consumption based on high-level data transactions between system components rather than on detailed signal or gate-level activities.

Publications

565

Citations

Authors

Institutions

Publications per year

2017–2026

Parents

Power Estimation

Publications

Power Trends in Communication Networks

Daniel C. Kilper, Gary Atkinson, S.K. Korotky et al. · IEEE Journal of Selected Topics in Quantum Electronics · 2010 · 184 citations

Computing, Communication, Electrical Engineering +17

A power estimation methodology for systemC transaction level models

Nagu Dhanwada, Ing-Chao Lin, Vijay Narayanan · 2005 · 70 citations

Engineering, Computer Engineering, Computer Science +17

Power Modeling in SystemC at Transaction Level, Application to a DVFS Architecture

Hugo Lebreton, Pascal Vivet · 2008 · 57 citations

Engineering, Computer Engineering, Computer Systems +17

Multi-Accuracy Power and Performance Transaction-Level Modeling

Giovanni Beltrame, Donatella Sciuto, Cristina Silvano · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2007 · 45 citations

Engineering, Computer Engineering, Computer Science +16

Using unified power format standard concepts for power-aware design and verification of systems-on-chip at transaction level

Ons Mbarek, Alain Pégatoquet, Michel Auguin · IET Circuits Devices & Systems · 2012 · 28 citations

Engineering, Computer Engineering, Computer Science +17

1–5 of 15

Authors

RB
Rabie Ben Atitallah
Laboratoire d'Automatique, de Mécanique et d'Informatique Industrielles et Humaines, France
3 publications · 62 citations
3
h-index
ND
Nagu Dhanwada
IBM (United States), United States
2 publications · 88 citations
2
h-index
SK
Santhosh Kumar Rethinagiri
Laboratoire d'Automatique, de Mécanique et d'Informatique Industrielles et Humaines, France
2 publications · 34 citations
2
h-index
IL
Ing-Chao Lin
National Cheng Kung University, Taiwan
2 publications · 88 citations
2
h-index
JD
Jean‐Luc Dekeyser
Laboratoire d'Informatique Fondamentale de Lille, France
2 publications · 46 citations
2
h-index

1–5 of 55

Institutions

1–8 of 29

Venues

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
1 publications · 45 citations
1
h-index
IEEE Journal of Selected Topics in Quantum Electronics
1 publications · 184 citations
1
h-index
IET Circuits Devices & Systems
1 publications · 28 citations
1
h-index
Asia and South Pacific Conference on Design Automation, 2006.
Conference · 1 publications · 15 citations
1
h-index
Design Automation for Embedded Systems
1 publications · 18 citations
1
h-index

1–5