Concepedia

System-level Electrostatic Discharge

System-Level Electrostatic Discharge is a type of electrostatic discharge event characterized by its occurrence within an integrated electronic system, distinguished from component-level or on-chip discharge phenomena by involving interactions between multiple components, subsystems, or interfaces under real-world operating conditions.

22

Publications

548

Citations

53

Authors

23

Institutions

Publications per year

2017–2026

3

Variants

System-level Esd

Parents

Publications

22

Susceptibility Scanning as a Failure Analysis Tool for System-Level Electrostatic Discharge (ESD) Problems

Giorgi Muchaidze, Ja-Yong Koo, Qing Cai et al. · IEEE Transactions on Electromagnetic Compatibility · 2008 · 84 citations

, , +12

Physical Mechanism and Device Simulation on Transient-Induced Latchup in CMOS ICs Under System-Level ESD Test

Ming‐Dou Ker, S.-F. Hsu · IEEE Transactions on Electron Devices · 2005 · 61 citations

, , +11

Component-Level Measurement for Transient-Induced Latch-up in CMOS ICs Under System-Level ESD Considerations

Ming‐Dou Ker, S.-F. Hsu · IEEE Transactions on Device and Materials Reliability · 2006 · 56 citations

, , +17

Correlation Between EUT Failure Levels and ESD Generator Parameters

Ja-Yong Koo, Qing Cai, Kai Wang et al. · IEEE Transactions on Electromagnetic Compatibility · 2008 · 49 citations

, , +15

On-Chip Transient Detection Circuit for System-Level ESD Protection in CMOS Integrated Circuits to Meet Electromagnetic Compatibility Regulation

Ming‐Dou Ker, Cheng-Cheng Yen, Pi-Chia Shih · IEEE Transactions on Electromagnetic Compatibility · 2008 · 35 citations

, , +15

1–5 of 22

Authors

53

  1. MK
    Ming‐Dou Ker

    National Yang Ming Chiao Tung University, Taiwan

    8 publications · 245 citations

    8

    h-index

  2. MB
    Marise Bafleur

    Laboratoire d'Analyse et d'Architecture des Systèmes, France

    4 publications · 62 citations

    4

    h-index

  3. CY
    Cheng-Cheng Yen

    National Yang Ming Chiao Tung University, Taiwan

    4 publications · 90 citations

    4

    h-index

  4. NM
    Nicolas Monnereau

    Laboratoire d'Analyse et d'Architecture des Systèmes, France

    3 publications · 51 citations

    3

    h-index

  5. NN
    Nicolas Nolhier

    Laboratoire d'Analyse et d'Architecture des Systèmes, France

    3 publications · 45 citations

    3

    h-index

1–5 of 53

Institutions

23

  1. National Yang Ming Chiao Tung University

    Hsinchu, Taiwan

    10 h-index

    20 publications

    568 citations

  2. Laboratoire d'Analyse et d'Architecture des Systèmes

    Toulouse, France

    4 h-index

    18 publications

    288 citations

  3. Université Toulouse III - Paul Sabatier

    Toulouse, France

    3 h-index

    7 publications

    109 citations

  4. I-Shou University

    Kaohsiung City, Taiwan

    3 h-index

    3 publications

    55 citations

  5. Missouri University of Science and Technology

    Rolla, United States

    2 h-index

    7 publications

    518 citations

  6. Samsung (South Korea)

    Seoul, South Korea

    2 h-index

    5 publications

    71 citations

  7. Centre National de la Recherche Scientifique

    Paris, France

    2 h-index

    8 publications

    138 citations

  8. Intel (United States)

    Santa Clara, United States

    2 h-index

    4 publications

    266 citations

1–8 of 23

Venues

  1. 7

    h-index

  2. 4

    h-index

  3. IEEE Transactions on Industrial Electronics

    3 publications · 52 citations

    3

    h-index

  4. IEEE Transactions on Electron Devices

    2 publications · 75 citations

    2

    h-index

  5. 1

    h-index

1–5