Reset Sequence Design
Reset Sequence Design is a methodological framework in embedded processor integration that specifies the controlled, deterministic initialization of processor states and peripheral configurations to ensure reliable system startup under defined hardware and software constraints.
11
Publications
412
Citations
46
Authors
15
Institutions
Publications per year
2017–2026
0
11
Experimental demonstration of reset control design
Yan Zheng, Yossi Chait, C.V. Hollot et al. · Control Engineering Practice · 2000 · 125 citations
Engineering, Electrical Engineering, Experimental Design +12
Stability analysis and design of reset systems: Theory and an application
Yuqian Guo, Youyi Wang, Lihua Xie et al. · Automatica · 2008 · 86 citations
Calculating resettability and reset sequences
Carl Pixley, G. Beihl · 2002 · 29 citations
1–5 of 11
46
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15

Brunel University of London
London, United Kingdom
2 h-index
2 publications
49 citations
Philips (Netherlands)
Amsterdam, The Netherlands
2 h-index
3 publications
183 citations

University of Ottawa
Ottawa, Canada
2 h-index
3 publications
72 citations
Siemens (Germany)
Munich, Germany
1 h-index
1 publications
29 citations
Toshiba (Japan)
Tokyo, Japan
1 h-index
15 publications
405 citations
Nanyang Technological University
Singapore, Singapore
1 h-index
3 publications
258 citations
Eindhoven University of Technology
Eindhoven, The Netherlands
1 h-index
1 publications
125 citations
Philips (Finland)
Vantaa, Finland
1 h-index
4 publications
116 citations
1–8 of 15
2 publications · 52 citations
2
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Repository · 1 publications · 10 citations
1
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1 publications · 86 citations
1
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1 publications · 27 citations
1
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1 publications · 22 citations
1
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