Concepedia

Register-transfer Level Assertions

Register-Transfer Level Assertions is a formal verification methodology that specifies and checks the intended behavior of digital circuits at the register-transfer level by embedding temporal logic assertions within the design to monitor signal relationships and data flow transitions over clock cycles.

31

Publications

981

Citations

77

Authors

35

Institutions

Publications per year

2017–2026

5

Variants

Rtl Assertions

Parents

Publications

31

GoldMine: Automatic assertion generation using data mining and static analysis

Shobha Vasudevan, David Sheridan, Sanjay J. Patel et al. · 2010 · 120 citations

, , +14

GoldMine: automatic assertion generation using data mining and static analysis

Shobha Vasudevan, David Sheridan, Sanjay J. Patel et al. · 2010 · 93 citations

, , +14

Mining Hardware Assertions With Guidance From Static Analysis

Samuel Hertz, David Sheridan, Shobha Vasudevan · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2013 · 92 citations

, , +15

Efficient validation input generation in RTL by hybridized source code analysis

Lingyi Liu, Shriram K. Vasudevan · 2011 · 67 citations

, , +16

Formal verification of a PowerPC microprocessor

D. Appenzeller, Andreas Kuehlmann · 2002 · 55 citations

, , +17

1–5 of 31

Authors

77

  1. SV
    Shobha Vasudevan

    University of Illinois Urbana-Champaign, United States

    5 publications · 342 citations

    5

    h-index

  2. LL
    Lingyi Liu

    University of Nebraska–Lincoln, United States

    3 publications · 103 citations

    3

    h-index

  3. GS
    Greg Stitt

    University of Florida, United States

    2 publications · 46 citations

    2

    h-index

  4. BT
    Bill Tuohy

    University of Illinois Urbana-Champaign, United States

    2 publications · 213 citations

    2

    h-index

  5. AD
    Alan D. George

    University of Florida, United States

    2 publications · 46 citations

    2

    h-index

1–5 of 77

Institutions

35

  1. University of Illinois Urbana-Champaign

    Urbana, United States

    7 h-index

    28 publications

    1.9K citations

  2. University of Florida

    Gainesville, United States

    4 h-index

    11 publications

    281 citations

  3. Indian Institute of Technology Kharagpur

    Kharagpur, India

    2 h-index

    6 publications

    92 citations

  4. Tallinn University of Technology

    Tallinn, Estonia

    2 h-index

    7 publications

    114 citations

  5. University of Oxford

    Oxford, United Kingdom

    2 h-index

    5 publications

    212 citations

  6. Mentor Technologies

    Tulsa, United States

    1 h-index

    2 publications

    30 citations

  7. IBM (United States)

    Armonk, United States

    1 h-index

    1 publications

    55 citations

  8. Shanghai Key Laboratory of Trustworthy Computing

    Shanghai, China

    1 h-index

    1 publications

    27 citations

1–8 of 35

Venues

  1. 4

    h-index

  2. IEEE Transactions on Computers

    1 publications · 13 citations

    1

    h-index

  3. Journal of Electronic Testing

    JETTA · 1 publications · 18 citations

    1

    h-index

  4. Computers & Electrical Engineering

    1 publications · 11 citations

    1

    h-index

  5. International Journal of Parallel Programming

    1 publications · 11 citations

    1

    h-index

1–5