Concepedia

Power Management Integration

Power Management Integration is a systematic framework within embedded processor integration that orchestrates dynamic power consumption control across hardware and software components by coordinating voltage, frequency, and operational state adjustments to optimize energy efficiency without compromising performance.

40

Publications

2.7K

Citations

161

Authors

52

Institutions

Publications per year

2017–2026

7

Parents

Publications

40

No "power" struggles

Ramya Raghavendra, Parthasarathy Ranganathan, Vanish Talwar et al. · 2008 · 628 citations

, , +15

FIVR — Fully integrated voltage regulators on 4th generation Intel® Core™ SoCs

Edward A. Burton, G. Schrom, Fabrice Paillet et al. · 2014 · 359 citations

, , +17

Power and Temperature Control on a 90-nm Itanium Family Processor

R. McGowen, C. Poirier, Chris Bostak et al. · IEEE Journal of Solid-State Circuits · 2005 · 298 citations

, , +17

Integrated CPU-GPU Power Management for 3D Mobile Games

Anuj Pathania, Qing Jiao, Alok Prakash et al. · 2014 · 147 citations

, , +17

No "power" struggles

Ramya Raghavendra, Parthasarathy Ranganathan, Vanish Talwar et al. · ACM SIGARCH Computer Architecture News · 2008 · 133 citations

, , +15

1–5 of 40

Authors

161

  1. PR
    Parthasarathy Ranganathan

    Hewlett-Packard (United States), United States

    4 publications · 814 citations

    4

    h-index

  2. ZW
    Zhikui Wang

    Hewlett-Packard (United States), United States

    4 publications · 814 citations

    4

    h-index

  3. XZ
    Xiaoyun Zhu

    Hewlett-Packard (United States), United States

    4 publications · 814 citations

    4

    h-index

  4. RR
    Ramya Raghavendra

    University of California, Santa Barbara, United States

    4 publications · 814 citations

    4

    h-index

  5. VT
    Vanish Talwar

    Hewlett-Packard (United States), United States

    4 publications · 814 citations

    4

    h-index

1–5 of 161

Institutions

52

  1. Hewlett-Packard (United States)

    Palo Alto, United States

    4 h-index

    16 publications

    3.3K citations

  2. University of California, Santa Barbara

    Santa Barbara, United States

    4 h-index

    4 publications

    814 citations

  3. IBM (United States)

    Armonk, United States

    3 h-index

    7 publications

    335 citations

  4. Intel (United States)

    Santa Clara, United States

    3 h-index

    15 publications

    4.6K citations

  5. ARM (United Kingdom)

    Cambridge, United Kingdom

    2 h-index

    8 publications

    236 citations

  6. Infineon Technologies (Germany)

    Munich, Germany

    2 h-index

    9 publications

    237 citations

  7. Carnegie Mellon University

    Pittsburgh, United States

    2 h-index

    6 publications

    72 citations

  8. Argonne National Laboratory

    Lemont, United States

    1 h-index

    2 publications

    32 citations

1–8 of 52

Venues

  1. IEEE Journal of Solid-State Circuits

    2 publications · 335 citations

    2

    h-index

  2. ACM SIGPLAN Notices

    1 publications · 18 citations

    1

    h-index

  3. Design, Automation, and Test in Europe

    Conference · 1 publications · 33 citations

    1

    h-index

  4. Energy

    1 publications · 38 citations

    1

    h-index

  5. Computing in Science & Engineering

    1 publications · 13 citations

    1

    h-index

1–5