Concepedia

Platform-level Integration

Platform-Level Integration is a holistic design methodology that integrates heterogeneous processing elements, memory subsystems, and peripheral interfaces into a unified embedded computing platform, distinguished by its abstraction of hardware-software co-design to enable seamless interoperability, resource sharing, and system-level optimization.

41

Publications

1.5K

Citations

170

Authors

66

Institutions

Publications per year

2017–2026

7

Parents

Publications

41

A 65 nm CMOS Quad-Band SAW-Less Receiver SoC for GSM/GPRS/EDGE

Ahmad Mirzaei, Hooman Darabi, Ahmad Yazdi et al. · IEEE Journal of Solid-State Circuits · 2011 · 159 citations

, , +16

RIFFA 2.1

Matthew Jacobsen, Dustin Richmond, Matthew Hogains et al. · ACM Transactions on Reconfigurable Technology and Systems · 2015 · 133 citations

, , +15

Roadmap to adopting OPC UA

Tom Hannelius, Mikko Salmenperä, Seppo Kuikka · 2008 · 104 citations

, , +16

Improving Data Quality Using Amazon Mechanical Turk Through Platform Setup

Lu Lu, Nathan Robert Neale, Nathaniel D. Line et al. · Cornell Hospitality Quarterly · 2021 · 94 citations

, , +8

Integration Challenges and Tradeoffs for Terascale Architectures

Mani Azimi · Intel Technology Journal · 2007 · 81 citations

, , +14

1–5 of 41

Authors

170

  1. MJ
    Matthew Jacobsen

    University of California San Diego, United States

    3 publications · 229 citations

    3

    h-index

  2. RK
    Ryan Kastner

    University of California San Diego, United States

    3 publications · 229 citations

    3

    h-index

  3. JP
    Joël Porquet

    Columbia University, United States

    2 publications · 26 citations

    2

    h-index

  4. SS
    Simha Sethumadhavan

    Columbia University, United States

    2 publications · 26 citations

    2

    h-index

  5. CJ
    Chia-Hong Jan

    Intel (United States), United States

    1 publications · 15 citations

    1

    h-index

1–5 of 170

Institutions

66

  1. Intel (United States)

    Santa Clara, United States

    3 h-index

    27 publications

    467 citations

  2. University of California San Diego

    San Diego, United States

    3 h-index

    9 publications

    765 citations

  3. Techniques of Informatics and Microelectronics for Integrated Systems Architecture

    Grenoble, France

    3 h-index

    3 publications

    105 citations

  4. Columbia University

    New York, United States

    2 h-index

    4 publications

    52 citations

  5. University of California, Berkeley

    Berkeley, United States

    2 h-index

    4 publications

    166 citations

  6. École Polytechnique Fédérale de Lausanne

    Lausanne, Switzerland

    2 h-index

    2 publications

    84 citations

  7. University of Vaasa

    Vaasa, Finland

    1 h-index

    1 publications

    104 citations

  8. Impression Technologies (United Kingdom)

    Coventry, United Kingdom

    1 h-index

    3 publications

    33 citations

1–8 of 66

Venues

  1. 2

    h-index

  2. Journal of Systems and Software

    JSS · 1 publications · 13 citations

    1

    h-index

  3. Microprocessors and Microsystems

    MICPRO · 1 publications · 12 citations

    1

    h-index

  4. 1

    h-index

  5. Jisuanji fangzhen

    1 publications · 11 citations

    1

    h-index

1–5