Non-Volatile Cache Design is a cache design approach that belongs to the class of low-power cache architectures and is distinguished by its use of non-volatile memory technologies to retain data without continuous power supply, thereby enabling energy-efficient, persistent caching with retained state during power cycles.
62
Publications
2.7K
Citations
228
Authors
94
Institutions
Publications per year
2017–2026
14
Parents
Publications
62
Relaxing non-volatility for fast and energy-efficient STT-RAM caches
Clinton W. Smullen, Vidyabhushan Mohan, Anurag Nigam et al. · 2011 · 394 citations
Managing Non-Volatile Memory in Database Systems
Alexander van Renen, Viktor Leis, Alfons Kemper et al. · 2018 · 118 citations
1–5 of 62
Authors
228
- SM
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- SF
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- LS
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1–5 of 228
Institutions
94
Oak Ridge National Laboratory
Oak Ridge, United States
4 h-index
9 publications
195 citations
Toshiba (Japan)
Tokyo, Japan
3 h-index
27 publications
741 citations
Indian Institute of Technology Guwahati
Guwahati, India
3 h-index
6 publications
92 citations
Pennsylvania State University
State College, United States
3 h-index
7 publications
308 citations
University of Pittsburgh
Pittsburgh, United States
3 h-index
3 publications
52 citations
Intel (United States)
Santa Clara, United States
3 h-index
20 publications
719 citations
Qualcomm (United Kingdom)
Farnborough, United Kingdom
3 h-index
3 publications
47 citations
City University of Hong Kong
Hong Kong, Hong Kong
3 h-index
10 publications
273 citations
1–8 of 94
Venues
- IEEE Transactions on Computers
4 publications · 71 citations
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- IEEE Transactions on Circuits and Systems I Regular Papers
1 publications · 37 citations
1
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- Journal of Circuits Systems and Computers
JCSC · 1 publications · 13 citations
1
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- ACM SIGARCH Computer Architecture News
1 publications · 18 citations
1
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- HAL (Le Centre pour la Communication Scientifique Directe)
Repository · 1 publications · 13 citations
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