R.E. Aly

Low-Power Cache Design Using 7T SRAM Cell

R.E. Aly, Magdy Bayoumi · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 2007 · 160 citations

Low-power Electronics, Non-volatile Memory, Electrical Engineering +11

A Family of 32 nm IA Processors

Nasser Kurd, Subramani Bhamidipati, Chris Mozak et al. · IEEE Journal of Solid-State Circuits · 2010 · 59 citations

Hardware Security, System On Chip, Electrical Engineering +14

Novel 7T sram cell for low power cache design

R.E. Aly, Maha Faisal, Magdy Bayoumi · 2005 · 58 citations

Low-power Electronics, Hardware Security, Electrical Engineering +13

Parallel high-speed architecture for EBCOT in JPEG2000

Yijun Li, R.E. Aly, Magdy Bayoumi et al. · 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing, 2003. Proceedings. (ICASSP '03). · 2003 · 19 citations

Engineering, Hardware Acceleration, High-performance Architecture +13

Variable-way set associative cache design for embedded system applications

R.E. Aly, B.R. Nallamilli, Magdy Bayoumi · 2006 · 13 citations

Associative Cache, Engineering, Energy Efficiency +18