Metastability Mitigation is a hardware design technique in digital systems that addresses the risk of unpredictable circuit behavior by reducing the likelihood or duration of metastable states in synchronization circuits through controlled timing, redundancy, or probabilistic resolution methods.
108
Publications
6.4K
Citations
388
Authors
144
Institutions
Publications per year
2017–2026
29
Parents
Publications
108
1–5 of 108
Authors
388
- AY
6
h-index
- RG
5
h-index
- DK
4
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- SB
3
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- BM
3
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1–5 of 388
Institutions
144
Stanford University
Stanford, United States
6 h-index
11 publications
318 citations
Newcastle University
Newcastle upon Tyne, United Kingdom
6 h-index
20 publications
396 citations
Technion – Israel Institute of Technology
Haifa, Israel
5 h-index
8 publications
467 citations
Intel (United States)
Santa Clara, United States
5 h-index
16 publications
2.9K citations
Massachusetts Institute of Technology
Cambridge, United States
4 h-index
5 publications
189 citations
Pohang University of Science and Technology
Pohang, South Korea
3 h-index
14 publications
962 citations
University of California, Los Angeles
Los Angeles, United States
3 h-index
4 publications
391 citations
Stanford SystemX Alliance
Stanford, United States
3 h-index
4 publications
233 citations
1–8 of 144
Venues
- IEEE Journal of Solid-State Circuits
13 publications · 1.2K citations
13
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- IEEE Transactions on Computers
7 publications · 516 citations
7
h-index
- IEEE Transactions on Circuits and Systems I Regular Papers
7 publications · 187 citations
6
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- IEEE Transactions on Circuits & Systems II Express Briefs
5 publications · 139 citations
5
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- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
4 publications · 129 citations
4
h-index
1–5