Memory Protection Hardware

Memory Protection Hardware is a type of hardware security mechanism that enforces access control and integrity policies for memory resources by physically isolating memory regions and restricting unauthorized or undefined access at the architectural level.

333

Publications

16.3K

Citations

1.1K

Authors

296

Institutions

Publications per year

2017–2026

111

Authors

1.1K

  1. RN
    Robert N. M. Watson

    University of Cambridge, United Kingdom

    9 publications · 687 citations

    9

    h-index

  2. PG
    Peter G. Neumann

    SRI International, United States

    9 publications · 687 citations

    9

    h-index

  3. PR
    Pedro Reviriego

    Universidad Nebrija, Spain

    9 publications · 258 citations

    9

    h-index

  4. YS
    Yan Solihin

    North Carolina State University, United States

    8 publications · 792 citations

    8

    h-index

  5. JA
    Juan Antonio Maestro

    Universidad Nebrija, Spain

    8 publications · 240 citations

    8

    h-index

1–5 of 1.1K

Venues

  1. IEEE Transactions on Nuclear Science

    15 publications · 575 citations

    13

    h-index

  2. ACM SIGARCH Computer Architecture News

    16 publications · 1.7K citations

    13

    h-index

  3. IEEE Transactions on Computers

    7 publications · 178 citations

    7

    h-index

  4. ACM SIGPLAN Notices

    6 publications · 201 citations

    6

    h-index

  5. IEEE Micro

    6 publications · 112 citations

    6

    h-index

1–5