Concepedia

Loop Unrolling

Loop Unrolling is a compiler optimization technique that belongs to the class of loop transformations, distinguished by its explicit replication of loop body instructions to reduce iteration overhead and expose instruction-level parallelism.

206

Publications

11.8K

Citations

493

Authors

184

Institutions

Publications per year

2017–2026

26

Parents

Publications

206

The program dependence graph and its use in optimization

Jeanne Ferrante, Karl J. Ottenstein, Joe Warren · ACM Transactions on Programming Languages and Systems · 1987 · 2.7K citations · Full text

, , +16

Auto-tuning a high-level language targeted to GPU codes

Scott Grauer-Gray, Lifan Xu, Robert Searles et al. · 2012 · 460 citations

, , +17

Optimizing Loop Operation and Dataflow in FPGA Acceleration of Deep Convolutional Neural Networks

Yufei Ma, Yu Cao, Sarma Vrudhula et al. · 2017 · 388 citations

, , +17

Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGA

Yufei Ma, Yu Cao, Sarma Vrudhula et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2018 · 347 citations

, , +17

Semi-Automatic Composition of Loop Transformations for Deep Parallelism and Memory Hierarchies

Sylvain Girbal, Nicolas Vasilache, Cédric Bastoul et al. · International Journal of Parallel Programming · 2006 · 213 citations

, , +17

1–5 of 206

Authors

493

  1. MO
    Michael O’Boyle

    University of Edinburgh, United Kingdom

    5 publications · 355 citations

    5

    h-index

  2. SJ
    Sanjay Jinturkar

    University of Virginia, United States

    5 publications · 131 citations

    5

    h-index

  3. BS
    Byoungro So

    University of Southern California, United States

    4 publications · 174 citations

    4

    h-index

  4. ML
    Mary Lou Soffa

    University of Pittsburgh, United States

    4 publications · 164 citations

    4

    h-index

  5. WH
    Wen‐mei Hwu

    University of Illinois Urbana-Champaign, United States

    4 publications · 114 citations

    4

    h-index

1–5 of 493

Institutions

184

  1. Princeton University

    Princeton, United States

    10 h-index

    23 publications

    726 citations

  2. IBM Research - Thomas J. Watson Research Center

    Yorktown Heights, United States

    7 h-index

    12 publications

    3.1K citations

  3. Intel (United States)

    Santa Clara, United States

    7 h-index

    14 publications

    987 citations

  4. University of Edinburgh

    Edinburgh, United Kingdom

    6 h-index

    10 publications

    400 citations

  5. University of Illinois Urbana-Champaign

    Urbana, United States

    6 h-index

    21 publications

    1.3K citations

  6. Universitat Politècnica de Catalunya

    Barcelona, Spain

    5 h-index

    14 publications

    277 citations

  7. University of Southern California

    Los Angeles, United States

    5 h-index

    16 publications

    743 citations

  8. University of California, Irvine

    Irvine, United States

    5 h-index

    8 publications

    357 citations

1–8 of 184

Venues

  1. ACM SIGPLAN Notices

    7 publications · 140 citations

    7

    h-index

  2. Parallel Computing

    6 publications · 141 citations

    6

    h-index

  3. International Symposium on Microarchitecture

    Conference · 4 publications · 86 citations

    4

    h-index

  4. International Journal of Parallel Programming

    5 publications · 318 citations

    4

    h-index

  5. 3

    h-index

1–5