International Symposium on Microarchitecture

Razor: a low-power pipeline based on circuit-level timing speculation

Dan Ernst, Nam Sung Kim, Shidhartha Das et al. · 2003 · 1.1K citations

Engineering, Vlsi Design, Power Optimization (Eda) +16

Orion: a power-performance simulator for interconnection networks

Hangsheng Wang, Xinping Zhu, Li-Shiuan Peh et al. · 2002 · 673 citations

Engineering, Energy Efficiency, Power Optimization (Eda) +16

Selective cache ways: on-demand cache resource allocation

David H. Albonesi · 1999 · 597 citations

Hardware Security, Power-aware Computing, Manycore Processor +15

Runtime power monitoring in high-end processors: methodology and empirical data

Canturk Isci, Margaret Martonosi · 2003 · 491 citations

Processor Power Measurement, Engineering, Computer Architecture +17

Speculative lock elision: enabling highly concurrent multithreaded execution

Ravi Rajwar, James Goodman · 2001 · 458 citations

Hardware Security, Engineering, Critical Sections +15