Logic Element Design
Logic Element Design is a foundational methodological construct in FPGA architecture that specifies the organizational and operational principles of configurable logic blocks, distinguishing itself by defining the minimal computational unit's structure, functionality, and configurability to enable efficient synthesis and mapping of digital circuits.
148
Publications
5.5K
Citations
449
Authors
159
Institutions
Publications per year
2017–2026
20
148
Testing of Quantum Cellular Automata
Mehdi B. Tahoori, Jing Huang, M. Momenzadeh et al. · IEEE Transactions on Nanotechnology · 2004 · 180 citations
Engineering, Computer Engineering, Electrical Engineering +13
The stratixπ routing and logic architecture
David Lewis, Vaughn Betz, David Jefferson et al. · 2003 · 157 citations
Engineering, Computer Engineering, Electrical Engineering +17
1–5 of 148
449
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159

University of Toronto
Toronto, Canada
13 h-index
26 publications
1.2K citations
Xilinx (United States)
San Jose, United States
6 h-index
11 publications
180 citations

Imperial College London
London, United Kingdom
3 h-index
6 publications
112 citations
New York University
New York, United States
3 h-index
6 publications
262 citations
Nanyang Technological University
Singapore, Singapore
3 h-index
4 publications
84 citations

Chinese Academy of Sciences
Beijing, China
3 h-index
14 publications
275 citations

University of Zielona Góra
Zielona Góra, Poland
3 h-index
7 publications
115 citations

Fu Jen Catholic University
Taipei, Taiwan
2 h-index
8 publications
96 citations
1–8 of 159
5 publications · 843 citations
5
h-index
4 publications · 101 citations
4
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JCSC · 3 publications · 48 citations
3
h-index
3 publications · 41 citations
3
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2 publications · 39 citations
2
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1–5