Logic Element Design

Logic Element Design is a foundational methodological construct in FPGA architecture that specifies the organizational and operational principles of configurable logic blocks, distinguishing itself by defining the minimal computational unit's structure, functionality, and configurability to enable efficient synthesis and mapping of digital circuits.

148

Publications

5.5K

Citations

449

Authors

159

Institutions

Publications per year

2017–2026

20

Authors

449

  1. JH
    Jason H. Anderson

    University of Toronto, Canada

    7 publications · 182 citations

    7

    h-index

  2. VB
    Vaughn Betz

    University of Toronto, Canada

    4 publications · 432 citations

    4

    h-index

  3. JR
    Jonathan Rose

    University of Toronto, Canada

    4 publications · 447 citations

    4

    h-index

  4. AB
    Alexander Barkalov

    University of Zielona Góra, Poland

    3 publications · 47 citations

    3

    h-index

  5. LT
    Larysa Titarenko

    University of Zielona Góra, Poland

    3 publications · 47 citations

    3

    h-index

1–5 of 449

Venues

  1. 5

    h-index

  2. IEEE Transactions on Computers

    4 publications · 101 citations

    4

    h-index

  3. Journal of Circuits Systems and Computers

    JCSC · 3 publications · 48 citations

    3

    h-index

  4. Electronics Letters

    3 publications · 41 citations

    3

    h-index

  5. Proceedings of the IRE

    2 publications · 39 citations

    2

    h-index

1–5