Shahar Kvatinsky - Concepedia

Author

Shahar Kvatinsky

Technion – Israel Institute of Technology ORCID

Also Known As

Kvatinsky, Shahar, S. Kvatinsky, Shahar KVATINSKY, Shahar Kvatinsky, shahar kvatinsky

205

Publications

7.1K

Citations

H-Index

113

Concepts

All Affiliations

Technion – Israel Institute of Technology University of Rochester Stanford University

About

Shahar Kvatinsky is an author at Technion – Israel Institute of Technology specializing in engineering, computer engineering, and computer architecture.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	32	57	6.2K
2	Applied Physics	5	5	72
3	Social Sciences	3	3	38
4	Medicine	1	1	13
5	Cell Biology	1	1	13

Shahar Kvatinsky

Publications

6.8K

Citations

H-Index

Page 1

	Year	Citations
VTEAM: A General Model for Voltage-Controlled Memristors Shahar Kvatinsky, M. Nisvo Ramadan, Eby G. Friedman, IEEE Transactions on Circuits & Systems II Express Briefs Electrical EngineeringVteam ModelEngineeringVoltage-controlled MemristorsThreshold Voltage	2015	810
TEAM: ThrEshold Adaptive Memristor Model Shahar Kvatinsky, Eby G. Friedman, Avinoam Kolodny, IEEE Transactions on Circuits and Systems I Regular Papers Electrical EngineeringEngineeringMemristive DevicesPractical Memristive DeviceComputational Neuroscience	2012	808
MAGIC—Memristor-Aided Logic Shahar Kvatinsky, Slavik Liman, Guy Satat, IEEE Transactions on Circuits & Systems II Express Briefs Non-volatile MemoryElectrical EngineeringEngineeringMemristor-only Logic FamilyComputer Engineering	2014	805
Memristor-Based Material Implication (IMPLY) Logic: Design Principles and Methodologies Shahar Kvatinsky, Guy Satat, Nimrod Wald, IEEE Transactions on Very Large Scale Integration (VLSI) Systems Materials EngineeringElectrical EngineeringEngineeringImply Logic FamilyLogic Family	2013	656
Logic Design Within Memristive Memories Using Memristor-Aided loGIC (MAGIC) Nishil Talati, Saransh Gupta, Pravin Mane, IEEE Transactions on Nanotechnology Non-volatile MemoryEngineeringMemory DesignEmerging Memory TechnologyComputer Architecture	2016	323
Memristor-Based Multilayer Neural Networks With Online Gradient Descent Training Daniel Soudry, Dotan Di Castro, A. Gal, IEEE Transactions on Neural Networks and Learning Systems Electrical EngineeringEngineeringComputational NeuroscienceCmos TransistorsMultilayer Neural Networks	2015	261
MRL &#x2014; Memristor Ratioed Logic Shahar Kvatinsky, Nimrod Wald, Guy Satat, Electrical EngineeringEngineeringMemristive DevicesEmerging Memory TechnologyComputer Architecture	2012	238
Memristor-based IMPLY logic design procedure Shahar Kvatinsky, Avinoam Kolodny, Uri Weiser, Logic SynthesisElectrical EngineeringEngineeringCircuit DesignAutomated Reasoning	2011	153
Two-terminal floating-gate transistors with a low-power memristive operation mode for analogue neuromorphic computing Loai Danial, Evgeny Pikhay, Eric Herbelin, Nature Electronics Electrical EngineeringTwo-terminal Floating-gate TransistorsEngineeringUnconventional ComputingComputer Engineering	2019	147
Sneak-path constraints in memristor crossbar arrays Yuval Cassuto, Shahar Kvatinsky, Eitan Yaakobi Hardware SecurityNon-volatile MemoryElectrical EngineeringEngineeringArray Content	2013	116

Page 1