Concepedia

Logic Density Optimization

Logic Density Optimization is a method in the domain of fine-grained reconfigurable architectures that enhances the amount of usable logic functionality per unit area by minimizing redundant or underutilized resources through architectural refinement and efficient mapping of computational tasks.

33

Publications

1.2K

Citations

152

Authors

23

Institutions

Publications per year

2017–2026

4

Parents

Publications

33

Placement and routing tools for the Triptych FPGA

Carl Ebeling, L. McMurchie, Scott Hauck et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 1995 · 170 citations

, , +16

The stratixπ routing and logic architecture

David Lewis, Vaughn Betz, David Jefferson et al. · 2003 · 157 citations

, , +17

Performance benefits of monolithically stacked 3D-FPGA

Mingjie Lin, Abbas El Gamal, Yi-Chang Lu et al. · 2006 · 96 citations

, , +17

5nm CMOS Production Technology Platform featuring full-fledged EUV, and High Mobility Channel FinFETs with densest 0.021µm<sup>2</sup> SRAM cells for Mobile SoC and High Performance Computing Applications

Geoffrey Yeap, S.S. Lin, Y. M. Chen et al. · 2019 · 93 citations

, , +13

The Triptych FPGA architecture

G. Borriello, Carl Ebeling, Scott Hauck et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 1995 · 69 citations

, , +16

1–5 of 33

Authors

152

  1. JR
    Jonathan Rose

    University of Toronto, Canada

    4 publications · 221 citations

    4

    h-index

  2. GP
    Giles Powell

    Altera (United States), United States

    3 publications · 189 citations

    3

    h-index

  3. AE
    Abbas El Gamal

    Stanford University, United States

    3 publications · 137 citations

    3

    h-index

  4. PL
    Paul Leventis

    Altera (United States), United States

    3 publications · 189 citations

    3

    h-index

  5. JH
    Jason H. Anderson

    University of Toronto, Canada

    3 publications · 49 citations

    3

    h-index

1–5 of 152

Institutions

23

  1. University of Toronto

    Toronto, Canada

    6 h-index

    10 publications

    193 citations

  2. Stanford University

    Stanford, United States

    3 h-index

    8 publications

    466 citations

  3. Xilinx (United States)

    San Jose, United States

    3 h-index

    8 publications

    240 citations

  4. University of Washington

    Seattle, United States

    2 h-index

    8 publications

    956 citations

  5. Altera (United States)

    San Jose, United States

    1 h-index

    9 publications

    108 citations

  6. Huawei Technologies (United States)

    Plano, United States

    1 h-index

    1 publications

    13 citations

  7. Toshiba (Japan)

    Tokyo, Japan

    1 h-index

    1 publications

    51 citations

  8. University of Waterloo

    Waterloo, Canada

    1 h-index

    1 publications

    13 citations

1–8 of 23

Venues

  1. 5

    h-index

  2. IEEE Transactions on Electron Devices

    1 publications · 36 citations

    1

    h-index

  3. KTH Publication Database DiVA (KTH Royal Institute of Technology)

    Repository · 1 publications · 12 citations

    1

    h-index

  4. Applied Optics

    1 publications · 36 citations

    1

    h-index

  5. Advances in radio science

    1 publications · 20 citations

    1

    h-index

1–5