Leakage-aware Cache Design

Leakage-Aware Cache Design is a hardware optimization methodology that belongs to the class of power-aware cache architectures, specifically distinguished by its integration of circuit- and architecture-level techniques to minimize static power dissipation due to subthreshold leakage in cache memory systems.

Publications

3.7K

Citations

103

Authors

Institutions

Publications per year

2017–2026

Parents

Leakage Power Reduction

Publications

Gated-V<sub>dd</sub>

Michael D. Powell, Se-Hyun Yang, Babak Falsafi et al. · 2000 · 669 citations · Full text

Engineering, Computer Engineering, Electrical Engineering +17

Cache decay

Stefanos Kaxiras, Zhigang Hu, Margaret Martonosi · 2001 · 613 citations

Engineering, Computer Engineering, Computer Science +17

Cache decay: exploiting generational behavior to reduce cache leakage power

Stefanos Kaxiras, Zhigang Hu, Margaret Martonosi · 2002 · 308 citations

Engineering, Computer Engineering, Computer Science +17

A novel cache architecture with enhanced performance and security

Zhenghong Wang, Ruby B. Lee · 2008 · 274 citations

Computing, Computer Engineering, Computer Science +17

Gated-V/sub dd/: a circuit technique to reduce leakage in deep-submicron cache memories

Michael D. Powell, Se-Hyun Yang, Babak Falsafi et al. · ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514) · 2000 · 267 citations

Engineering, Computer Engineering, Electrical Engineering +17

1–5 of 33

Authors

103

BF
Babak Falsafi
Carnegie Mellon University, United States
6 publications · 1.3K citations
6
h-index
MD
Michael D. Powell
Purdue University West Lafayette, United States
5 publications · 1.3K citations
5
h-index
SY
Se-Hyun Yang
Purdue University West Lafayette, United States
4 publications · 1.1K citations
4
h-index
SR
Stefan Rusu
Intel (United States), United States
4 publications · 275 citations
4
h-index
SK
Stefanos Kaxiras
Uppsala University, Sweden
4 publications · 1K citations
4
h-index

1–5 of 103

Institutions

1–8 of 21

Venues

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
6 publications · 249 citations
6
h-index
IEEE Journal of Solid-State Circuits
4 publications · 243 citations
4
h-index
ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514)
Conference · 2 publications · 288 citations
2
h-index
Sustainable Computing Informatics and Systems
1 publications · 127 citations
1
h-index
IEEE Embedded Systems Letters
1 publications · 64 citations
1
h-index

1–5