Interconnect Power Estimation is a method within the field of power estimation that specifically quantifies the dynamic and static power consumption attributed to signal transmission and parasitic effects in the interconnecting wires and networks of integrated circuits.
42
Publications
1.6K
Citations
111
Authors
40
Institutions
Publications per year
2017–2026
1
Parents
Publications
42
Interconnect and thermal-aware floorplanning for 3D microprocessors
1–5 of 42
Authors
111
- NK
4
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- LZ
4
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- MI
3
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- FN
2
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- AB
2
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1–5 of 111
Institutions
40
University of California, Los Angeles
Los Angeles, United States
7 h-index
12 publications
299 citations
Princeton University
Princeton, United States
5 h-index
10 publications
584 citations
University of California San Diego
San Diego, United States
3 h-index
6 publications
678 citations
Pennsylvania State University
State College, United States
3 h-index
11 publications
1K citations
Fudan University
Shanghai, China
2 h-index
2 publications
30 citations
University of Illinois Urbana-Champaign
Urbana, United States
2 h-index
4 publications
200 citations
Linköping University
Linköping, Sweden
2 h-index
2 publications
37 citations
Korea Advanced Institute of Science and Technology
Daejeon, South Korea
2 h-index
7 publications
126 citations
1–8 of 40
Venues
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2 publications · 78 citations
2
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- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2 publications · 311 citations
2
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- ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486)
Conference · 2 publications · 25 citations
2
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- Proceedings - ACM IEEE Design Automation Conference
1 publications · 81 citations
1
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- Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design
ICCAD · 1 publications · 67 citations
1
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