Instruction Window Management is a processor microarchitectural mechanism that governs the dynamic allocation, tracking, and retirement of instructions within the out-of-order execution engine by maintaining data dependencies and execution readiness in superscalar pipelines.
51
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3.7K
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112
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Publications per year
2017–2026
1
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51
A dynamic multithreading processor
Haitham Akkary, Michael A. Driscoll · 1998 · 288 citations
Srikanth T. Srinivasan, Ravi Rajwar, Haitham Akkary et al. · 2004 · 194 citations
1–5 of 51
Authors
112
- HA
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5
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- ASAndré Seznec
Institut de Recherche en Informatique et Systèmes Aléatoires, France
4 publications · 199 citations
4
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1–5 of 112
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Intel (United States)
Santa Clara, United States
11 h-index
25 publications
2.5K citations
The University of Texas at Austin
Austin, United States
5 h-index
17 publications
1.9K citations
Institut national de recherche en sciences et technologies du numérique
Le Chesnay-Rocquencourt, France
4 h-index
5 publications
308 citations
Universitat Politècnica de Catalunya
Barcelona, Spain
4 h-index
8 publications
327 citations
Universidad de Zaragoza
Zaragoza, Spain
3 h-index
5 publications
171 citations
Portland State University
Portland, United States
3 h-index
3 publications
454 citations
Institut de Recherche en Informatique et Systèmes Aléatoires
Rennes, France
3 h-index
4 publications
255 citations
Indian Institute of Science Bangalore
Bengaluru, India
2 h-index
5 publications
272 citations
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Venues
- IEEE Micro
3 publications · 167 citations
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- ACM SIGARCH Computer Architecture News
3 publications · 632 citations
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- ACM Transactions on Architecture and Code Optimization
TACO · 2 publications · 37 citations
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- The Computer Journal
1 publications · 31 citations
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- Behavior Research Methods, Instruments, & Computers
1 publications · 59 citations
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