Concepedia

Instruction Scheduling Algorithms

Instruction Scheduling Algorithms is a computational method within processor architecture that determines the optimal execution order of instructions to maximize parallelism and resource utilization while preserving program semantics, differing from other instruction-level optimization techniques by explicitly reordering operations to resolve data and control dependencies in out-of-order execution pipelines.

266

Publications

11K

Citations

542

Authors

181

Institutions

Publications per year

2017–2026

7

Parents

Publications

266

Memory dependence prediction using store sets

George Chrysos, Joel Emer · 1998 · 291 citations

, , +17

Highly concurrent scalar processing

Ping‐Yu Hsu, Edward S. Davidson · ACM SIGARCH Computer Architecture News · 1986 · 235 citations · Full text

, , +17

The Multicluster Architecture: Reducing Cycle Time Through Partitioning

1997 · 235 citations

, , +17

Exact and approximate algorithms for the extension of embedded processor instruction sets

Laura Pozzi, Kubilay Atasu, Paolo Ienne · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2006 · 209 citations · Full text

, , +17

The IBM System/360 Model 91: Floating-Point Execution Unit

S. F. Anderson, J. G. Earle, Robert E Goldschmidt et al. · IBM Journal of Research and Development · 1967 · 197 citations

, , +17

1–5 of 266

Authors

542

  1. SJ
    Susan J. Eggers

    University of Washington, United States

    9 publications · 352 citations

    9

    h-index

  2. JE
    James E. Smith

    University of Wisconsin–Madison, United States

    6 publications · 336 citations

    6

    h-index

  3. ES
    Edward S. Davidson

    University of Michigan, United States

    6 publications · 417 citations

    6

    h-index

  4. AG
    Antonio González

    Universitat Politècnica de Catalunya, Spain

    6 publications · 253 citations

    6

    h-index

  5. MS
    Michael Schlansker

    Hewlett-Packard (United States), United States

    5 publications · 278 citations

    5

    h-index

1–5 of 542

Institutions

181

  1. Hewlett-Packard (United States)

    Palo Alto, United States

    13 h-index

    28 publications

    1.9K citations

  2. University of Wisconsin–Madison

    Madison, United States

    10 h-index

    18 publications

    630 citations

  3. University of Michigan

    Ann Arbor, United States

    9 h-index

    19 publications

    848 citations

  4. Universitat Politècnica de Catalunya

    Barcelona, Spain

    8 h-index

    16 publications

    583 citations

  5. IBM Research - Thomas J. Watson Research Center

    Yorktown Heights, United States

    8 h-index

    13 publications

    699 citations

  6. Intel (United States)

    Santa Clara, United States

    7 h-index

    14 publications

    948 citations

  7. IBM (United States)

    Armonk, United States

    7 h-index

    7 publications

    424 citations

  8. University of Washington

    Seattle, United States

    7 h-index

    20 publications

    585 citations

1–8 of 181

Venues

  1. ACM SIGPLAN Notices

    13 publications · 477 citations

    11

    h-index

  2. ACM SIGARCH Computer Architecture News

    7 publications · 483 citations

    7

    h-index

  3. 6

    h-index

  4. IEEE Transactions on Computers

    5 publications · 351 citations

    5

    h-index

  5. ACM Transactions on Design Automation of Electronic Systems

    TODAES · 4 publications · 140 citations

    4

    h-index

1–5