Concepedia

Instruction Fetch Bandwidth

Instruction Fetch Bandwidth is the maximum rate at which an instruction pipeline can retrieve instructions from memory, measured in instructions per cycle, distinguishing it among processor performance metrics by its focus on the fetch stage throughput in instruction-level parallelism architectures.

45

Publications

2.3K

Citations

85

Authors

31

Institutions

Publications per year

2017–2026

0

Parents

Publications

45

Trace Cache: A Low Latency Approach to High Bandwidth Instruction Fetching

Minds at UW (University of Wisconsin) · 1996 · 443 citations

, , +15

Trace cache: a low latency approach to high bandwidth instruction fetching

Eric Rotenberg, S. Bennett, James E. Smith · 2002 · 231 citations

, , +15

Optimization of instruction fetch mechanisms for high issue rates

Thomas M. Conte, Kishore N. Menezes, Patrick M. Mills et al. · 1995 · 169 citations · Full text

, , +17

The impact of delay on the design of branch predictors

Daniel A. Jiménez, Stephen W. Keckler, Calvin Lin · 2000 · 130 citations · Full text

, , +15

Increasing the instruction fetch rate via multiple branch prediction and a branch address cache

Tse-Yu Yeh, Deborah T. Marr, Yale N. Patt · 2014 · 125 citations

, , +12

1–5 of 45

Authors

85

  1. AM
    Avi Mendelson

    Technion – Israel Institute of Technology, Israel

    4 publications · 120 citations

    4

    h-index

  2. TM
    Thomas M. Conte

    North Carolina State University, United States

    4 publications · 281 citations

    4

    h-index

  3. KN
    Kishore N. Menezes

    North Carolina State University, United States

    4 publications · 281 citations

    4

    h-index

  4. MV
    Mateo Valero

    Universitat Politècnica de Catalunya, Spain

    4 publications · 64 citations

    4

    h-index

  5. DA
    Daniel A. Jiménez

    Texas A&M University, United States

    4 publications · 193 citations

    4

    h-index

1–5 of 85

Institutions

31

  1. Universitat Politècnica de Catalunya

    Barcelona, Spain

    7 h-index

    17 publications

    379 citations

  2. Intel (United States)

    Santa Clara, United States

    5 h-index

    5 publications

    417 citations

  3. University of Michigan

    Ann Arbor, United States

    3 h-index

    9 publications

    768 citations

  4. Technion – Israel Institute of Technology

    Haifa, Israel

    3 h-index

    6 publications

    202 citations

  5. Carnegie Mellon University

    Pittsburgh, United States

    3 h-index

    9 publications

    288 citations

  6. Institut national de recherche en sciences et technologies du numérique

    Le Chesnay-Rocquencourt, France

    3 h-index

    4 publications

    151 citations

  7. The University of Texas at Austin

    Austin, United States

    3 h-index

    13 publications

    709 citations

  8. Clemson University

    Clemson, United States

    2 h-index

    4 publications

    78 citations

1–8 of 31

Venues

  1. IEEE Transactions on Computers

    3 publications · 129 citations

    3

    h-index

  2. ACM SIGARCH Computer Architecture News

    3 publications · 45 citations

    3

    h-index

  3. International Symposium on Microarchitecture

    Conference · 1 publications · 25 citations

    1

    h-index

  4. 1

    h-index

  5. 1

    h-index

1–5