Increasing the instruction fetch rate via multiple branch prediction and a branch address cache

Abstract

research-article Share on Increasing the instruction fetch rate via multiple branch prediction and a branch address cache Authors: Tse-Yu Yeh Univ. of Michigan, Ann Arbor Univ. of Michigan, Ann ArborView Profile , Deborah T. Marr Univ. of Michigan, Ann Arbor Univ. of Michigan, Ann ArborView Profile , Yale N. Patt Univ. of Michigan, Ann Arbor Univ. of Michigan, Ann ArborView Profile Authors Info & Claims ACM International Conference on Supercomputing 25th Anniversary VolumeJune 2014 Pages 183–192https://doi.org/10.1145/2591635.2667167Online:01 August 1993Publication History 1citation357DownloadsMetricsTotal Citations1Total Downloads357Last 12 Months9Last 6 weeks1 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my Alerts New Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access