Input Delay Calibration
Input Delay Calibration is a hardware-level methodology in I/O architecture that characterizes and compensates for timing discrepancies between an input signal and the system clock by adjusting the sampling point through programmable delay elements to ensure reliable data capture.
10
Publications
293
Citations
40
Authors
19
Institutions
Publications per year
2017–2026
2
Parents
10
Dongwan Ha, Kyoungho Woo, Scott Meninger et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2011 · 91 citations
Engineering, Computer Engineering, Electrical Engineering +16
An 8-Bit 4-GS/s 120-mW CMOS ADC
He-Gong Wei, Peng Zhang, Bibhu Datta Sahoo et al. · 2013 · 23 citations
1–5 of 10
40
1
h-index
1
h-index
1
h-index
1
h-index
Korea Advanced Institute of Science and Technology, South Korea
1 publications · 14 citations
1
h-index
1–5 of 40
19

University of Toronto
Toronto, Canada
1 h-index
1 publications
44 citations
Korea Advanced Institute of Science and Technology
Daejeon, South Korea
1 h-index
6 publications
84 citations

Czech Technical University in Prague
Prague, Czechia
1 h-index
3 publications
51 citations

Xidian University
Xi'an, China
1 h-index
5 publications
85 citations
Austrian Academy of Sciences
Vienna, Austria
1 h-index
3 publications
51 citations

Amrita Vishwa Vidyapeetham
Coimbatore, India
1 h-index
1 publications
23 citations
Technical University of Munich
Munich, Germany
1 h-index
1 publications
17 citations
University of California, Los Angeles
Los Angeles, United States
1 h-index
2 publications
46 citations
1–8 of 19
1 publications · 17 citations
1
h-index
1 publications · 15 citations
1
h-index
1 publications · 17 citations
1
h-index
2 publications · 61 citations
1
h-index
1 publications · 14 citations
1
h-index
1–5