Hardware Task Scheduling

Hardware Task Scheduling is a computational orchestration mechanism that determines the optimal temporal and spatial allocation of reconfigurable hardware tasks onto dynamically reconfigurable regions of a programmable logic device to maximize resource utilization, performance, or energy efficiency under given constraints.

115

Publications

4.2K

Citations

372

Authors

143

Institutions

Publications per year

2017–2026

22

Authors

372

  1. HS
    H. Simmler

    George Washington University, United States

    4 publications · 97 citations

    4

    h-index

  2. MH
    Miaoqing Huang

    University of Arkansas at Fayetteville, United States

    3 publications · 52 citations

    3

    h-index

  3. TE
    Tarek El‐Ghazawi

    George Washington University, United States

    3 publications · 52 citations

    3

    h-index

  4. SB
    Sudarshan Banerjee

    University of California, Irvine, United States

    3 publications · 46 citations

    3

    h-index

  5. TM
    Thomas Marconi

    Delft University of Technology, Netherlands

    3 publications · 56 citations

    3

    h-index

1–5 of 372

Venues

  1. IEEE Transactions on Computers

    4 publications · 356 citations

    4

    h-index

  2. 4

    h-index

  3. 3

    h-index

  4. IEEE Transactions on Parallel and Distributed Systems

    TPDS · 2 publications · 34 citations

    2

    h-index

  5. IEEE Access

    2 publications · 87 citations

    2

    h-index

1–5