Functional Verification Debugging is a systematic method within hardware debugging that identifies and resolves discrepancies between the intended functional behavior of a hardware design and its actual behavior as observed during simulation or emulation, specifically focusing on logical correctness rather than timing or physical implementation.
21
Publications
494
Citations
85
Authors
26
Institutions
Publications per year
2017–2026
4
Parents
Publications
21
Towards Developing High Performance RISC-V Processors Using Agile Methodology
Hardware emulation for functional verification of K5
Gopi Ganapathy, Ram Narayan, Glenn Jorden et al. · 1996 · 42 citations
1–5 of 21
Authors
85
- AV
6
h-index
- BK
3
h-index
- LY
2
h-index
- SG
2
h-index
- NN
2
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1–5 of 85
Institutions
26
University of Toronto
Toronto, Canada
6 h-index
12 publications
201 citations
University of Illinois Urbana-Champaign
Urbana, United States
2 h-index
2 publications
25 citations
McMaster University
Hamilton, Canada
2 h-index
2 publications
49 citations
Nanyang Technological University
Singapore, Singapore
2 h-index
3 publications
38 citations
Advanced Digital Sciences Center
Singapore, Singapore
2 h-index
5 publications
63 citations
Technische Universität Darmstadt
Darmstadt, Germany
1 h-index
1 publications
15 citations
Institute of Computing Technology
Beijing, China
1 h-index
28 publications
2.6K citations
Shenzhen University
Shenzhen, China
1 h-index
3 publications
282 citations
1–8 of 26
Venues
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2 publications · 47 citations
2
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- IEEE Design & Test of Computers
2 publications · 30 citations
2
h-index
- 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC)
Conference · 1 publications · 21 citations
1
h-index
- IEEE Circuits and Devices Magazine
1 publications · 13 citations
1
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- Electronics
1 publications · 15 citations
1
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