Decode Unit
A Decode Unit is a processor microarchitecture component that translates fetched machine instructions into control signals and microoperations, distinguishing it from other pipeline stages by its role in converting instruction set architecture opcodes into executable actions.
9
Publications
147
Citations
39
Authors
11
Institutions
Publications per year
2017–2026
1
Parents
9
Protecting RISC-V Processors against Physical Attacks
Mario Werner, Robert Schilling, Thomas Unterluggauer et al. · 2019 · 18 citations · Full text
5.5 Steamroller: An x86-64 core implemented in 28nm bulk CMOS
Kevin Gillespie, Harry R. Fair, Carson Henrion et al. · 2014 · 17 citations
1–5 of 9
39
1
h-index
1
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1
h-index
IBM Research - Thomas J. Watson Research Center, United States
1 publications · 17 citations
1
h-index
1
h-index
1–5 of 39
11
Applied Logic Laboratory (Hungary)
Budapest, Hungary
1 h-index
1 publications
12 citations
Politecnico di Torino
Turin, Italy
1 h-index
5 publications
105 citations
Texas Instruments (United States)
Dallas, United States
1 h-index
1 publications
26 citations
STMicroelectronics (Switzerland)
Geneva, Switzerland
1 h-index
3 publications
63 citations
Advanced Micro Devices (United States)
Sunnyvale, United States
1 h-index
3 publications
51 citations
Graz University of Technology
Graz, Austria
1 h-index
4 publications
72 citations
North Carolina State University
Raleigh, United States
1 h-index
2 publications
30 citations
STMicroelectronics (Italy)
Milan, Italy
1 h-index
3 publications
63 citations
1–8 of 11
1 publications · 13 citations
1
h-index
1 publications · 26 citations
1
h-index
1 publications · 12 citations
1
h-index
1 publications · 15 citations
1
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1–4