Data Hazard Resolution
Data Hazard Resolution is a formal method within the domain of processor architecture that uniquely identifies and mitigates dependencies between instructions in a pipeline by ensuring correct data availability through forwarding, stalling, or reordering mechanisms to preserve computational integrity.
3
Publications
64
Citations
13
Authors
5
Institutions
Publications per year
2017–2026
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Dynamic Hazard Resolution for Pipelining Irregular Loops in High-Level Synthesis
Steve Dai, Ritchie Zhao, Gai Liu et al. · 2017 · 40 citations · Full text
A Comprehensive Analysis on Data Hazard for RISC32 5-Stage Pipeline Processor
Wei Pau Kiat, Kai‐Ming Mok, Wai‐Kong Lee et al. · 2017 · 12 citations
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University of Strathclyde
Glasgow, United Kingdom
1 h-index
1 publications
12 citations

Cornell University
Ithaca, United States
1 h-index
6 publications
240 citations

Harvard University Press
Cambridge, United States
1 h-index
1 publications
40 citations
Universiti Tunku Abdul Rahman
Kampar, Malaysia
1 h-index
4 publications
48 citations
Queen's University
Kingston, Canada
1 h-index
1 publications
12 citations
1–5 of 5