Accelerating Binarized Convolutional Neural Networks with Software-Programmable FPGAs

Ritchie Zhao, Weinan Song, Wentao Zhang, +5

Software-programmable FpgasConvolutional Neural NetworkEngineeringMachine LearningHardware Acceleration +11

Serving DNNs in Real Time at Datacenter Scale with Project Brainwave

Eric S. Chung, Jeremy Fowers, Kalin Ovtcharov, +40

IEEE Micro

EngineeringHigh Performance Computer NetworkAdvanced ComputingComputer ArchitectureData Center Network +17

Improving Neural Network Quantization without Retraining using Outlier Channel Splitting

Ritchie Zhao, Yuwei Hu, Jordan Dotzel, +2

arXiv (Cornell University)

Convolutional Neural NetworkEngineeringMachine LearningAutoencodersComputer Architecture +17

Rosetta

Yuan Zhou, Udit Gupta, Steve Dai, +9

Hardware SecurityEngineeringHardware AccelerationProgram AnalysisHigh-performance Architecture +11

Improving Neural Network Quantization without Retraining using Outlier Channel Splitting

Ritchie Zhao, Yuwei Hu, Jordan Dotzel, +2

International Conference on Machine Learning

Convolutional Neural NetworkEngineeringMachine LearningAutoencodersComputer Architecture +17

The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips

Scott Davidson, Shaolin Xie, Christopher Torng, +17

IEEE Micro

EngineeringComputer ArchitectureDesign MethodologiesProcessor ArchitectureFast Chips +14

Pushing the Limits of Narrow Precision Inferencing at Cloud Scale with Microsoft Floating Point

Bita Darvish Rouhani, Daniel Lo, Ritchie Zhao, +21

Neural Information Processing Systems

EngineeringAdvanced ComputingVerificationHardware AlgorithmComputer Architecture +21

A Parallel Bandit-Based Approach for Autotuning FPGA Compilation

Chang Xu, Gai Liu, Ritchie Zhao, +3

EngineeringAdvanced ComputingComputer ArchitectureSoftware EngineeringAutotuning Fpga Compilation +15

Dynamic Hazard Resolution for Pipelining Irregular Loops in High-Level Synthesis

Steve Dai, Ritchie Zhao, Gai Liu, +4

Dynamic Hazard ResolutionEngineeringAccelerated DesignComputer ArchitectureSystem Synthesis +25

ElasticFlow: A complexity-effective approach for pipelining irregular loop nests

Mingxing Tan, Gai Liu, Ritchie Zhao, +2

2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

Commercial Hls ToolModern High-level SynthesisEngineeringComputer ArchitectureComputational Complexity +14