Clocked Logic

Clocked Logic is a sequential logic design methodology in which state transitions and signal propagation within a digital circuit are synchronized to the rising or falling edges of a global clock signal, distinguishing it from asynchronous logic by enforcing temporal regularity through periodic timing control.

66

Publications

2.5K

Citations

201

Authors

72

Institutions

Publications per year

2017–2026

4

Variants

Synchronous Logic

Authors

201

  1. GH
    Gary H. Bernstein

    University of Notre Dame, United States

    4 publications · 314 citations

    4

    h-index

  2. AO
    Alexei O. Orlov

    University of Notre Dame, United States

    3 publications · 122 citations

    3

    h-index

  3. MN
    Michael Niemier

    University of Notre Dame, United States

    3 publications · 297 citations

    3

    h-index

  4. XS
    Xiaobo Sharon Hu

    University of Notre Dame, United States

    3 publications · 297 citations

    3

    h-index

  5. BN
    Borivoje Nikolić

    University of California, Berkeley, United States

    3 publications · 234 citations

    3

    h-index

1–5 of 201

Venues

  1. IEEE Transactions on Nanotechnology

    4 publications · 332 citations

    4

    h-index

  2. IEEE Journal of Solid-State Circuits

    4 publications · 230 citations

    4

    h-index

  3. 3

    h-index

  4. Applied Physics Letters

    4 publications · 130 citations

    3

    h-index

  5. Journal of Applied Physics

    2 publications · 42 citations

    2

    h-index

1–5