Concepedia

Clock Enable Logic

Clock Enable Logic is a digital circuit design technique that belongs to the class of power optimization methods in synchronous systems, distinguished by its use of a control signal to selectively gate the clock pulse to sequential elements, thereby reducing dynamic power consumption without altering the functional timing behavior of the circuit.

9

Publications

207

Citations

44

Authors

18

Institutions

Publications per year

2017–2026

0

Parents

Publications

9

Clock power reduction for virtex-5 FPGAs

Qiang Wang, Subodh Gupta, Jason H. Anderson · 2009 · 40 citations

, , +17

Clock gating and clock enable for FPGA power reduction

Juan Pablo Oliver, J. J. Curto, Diego Bouvier et al. · 2012 · 39 citations

, , +17

Low Power VLSI Circuit Design with Efficient HDL Coding

Bishwajeet Pandey, Manisha Pattanaik · 2013 · 28 citations

, , +17

A clock-gating method for low-power LSI design

Takeshi Kitahara, F. Minami, Tetsuzo Ueda et al. · 2002 · 28 citations

, , +17

A Novel and Practical Control Scheme for Inter-Clock At-Speed Testing

Hiroshi Furukawa, Xiaoqing Wen, Laung‐Terng Wang et al. · Proceedings/Proceedings - International Test Conference · 2006 · 22 citations · Full text

, , +17

1–5 of 9

Authors

44

  1. YL
    Y.X. Liu

    Northwestern Polytechnical University, China

    1 publications · 11 citations

    1

    h-index

  2. DC
    D. Clawin

    Ruhr University Bochum, Germany

    1 publications · 14 citations

    1

    h-index

  3. WA
    W. Athas

    Marina Del Rey Hospital, United States

    1 publications · 14 citations

    1

    h-index

  4. SP
    Seongmo Park

    Electronics and Telecommunications Research Institute, South Korea

    1 publications · 11 citations

    1

    h-index

  5. YL
    Y.M. Li

    Chang'an University, China

    1 publications · 11 citations

    1

    h-index

1–5 of 44

Institutions

18

  1. Alcatel Lucent (Germany)

    Stuttgart, Germany

    1 h-index

    1 publications

    14 citations

  2. Xidian University

    Xi'an, China

    1 h-index

    2 publications

    22 citations

  3. University of Toronto

    Toronto, Canada

    1 h-index

    1 publications

    40 citations

  4. Ruhr University Bochum

    Bochum, Germany

    1 h-index

    3 publications

    42 citations

  5. Kyushu Institute of Technology

    Kitakyushu, Japan

    1 h-index

    2 publications

    44 citations

  6. Ministry of Education

    Taipei, Taiwan

    1 h-index

    2 publications

    22 citations

  7. Toshiba (Japan)

    Tokyo, Japan

    1 h-index

    7 publications

    196 citations

  8. Syntek Technologies (United States)

    Fairfax, United States

    1 h-index

    4 publications

    88 citations

1–8 of 18

Venues

  1. IET Power Electronics

    PEL · 1 publications · 11 citations

    1

    h-index

  2. IEEE Journal of Solid-State Circuits

    1 publications · 14 citations

    1

    h-index

  3. Proceedings/Proceedings - International Test Conference

    ITC · 1 publications · 22 citations

    1

    h-index

1–3