Concepedia

Cache Static Power Reduction

Cache Static Power Reduction is a methodology in low-power cache design that minimizes the power consumed by cache memory due to leakage currents during idle or inactive states, distinguishing itself from dynamic power reduction techniques by targeting the static component of power dissipation inherent in transistor-level storage elements.

20

Publications

795

Citations

58

Authors

21

Institutions

Publications per year

2017–2026

3

Parents

Publications

20

Dynamic zero compression for cache energy reduction

Luís Villa, Michael Zhang, Krste Asanović · 2000 · 195 citations

, , +17

Adaptive Mode Control: A Static-Power-Efficient Cache Design

Huiyang Zhou, Mark C. Toburen, Eric Rotenberg et al. · 2001 · 117 citations

, , +17

Static energy reduction techniques for microprocessor caches

Heather Hanson, M.S. Hrishikesh, Vikas Agarwal et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2003 · 104 citations

, , +17

Adaptive mode control

Huiyang Zhou, Mark C. Toburen, Eric Rotenberg et al. · ACM Transactions on Embedded Computing Systems · 2003 · 66 citations

, , +17

Dynamic zero compression for cache energy reduction

Luís Villa, M. Zhang, Krste Asanović · 2002 · 42 citations

, , +17

1–5 of 20

Authors

58

  1. TM
    Thomas M. Conte

    North Carolina State University, United States

    3 publications · 222 citations

    3

    h-index

  2. MC
    Mark C. Toburen

    North Carolina State University, United States

    3 publications · 222 citations

    3

    h-index

  3. HZ
    Huiyang Zhou

    North Carolina State University, United States

    3 publications · 222 citations

    3

    h-index

  4. ER
    Eric Rotenberg

    North Carolina State University, United States

    2 publications · 183 citations

    2

    h-index

  5. DB
    Doug Burger

    The University of Texas at Austin, United States

    2 publications · 128 citations

    2

    h-index

1–5 of 58

Institutions

21

  1. North Carolina State University

    Raleigh, United States

    3 h-index

    12 publications

    888 citations

  2. University of Pisa

    Pisa, Italy

    2 h-index

    6 publications

    114 citations

  3. International Institute of Information Technology

    Naya Raipur, India

    2 h-index

    5 publications

    121 citations

  4. The University of Texas at Austin

    Austin, United States

    2 h-index

    8 publications

    432 citations

  5. University of Rochester

    Rochester, United States

    1 h-index

    3 publications

    30 citations

  6. UC Irvine Health

    Orange, United States

    1 h-index

    3 publications

    75 citations

  7. Fourth Paradigm Institute

    Bengaluru, India

    1 h-index

    2 publications

    22 citations

  8. Indian Institute of Management Raipur

    Raipur, India

    1 h-index

    3 publications

    99 citations

1–8 of 21

Venues

  1. 2

    h-index

  2. IEICE Transactions on Electronics

    1 publications · 16 citations

    1

    h-index

  3. 1

    h-index

  4. The Journal of Supercomputing

    1 publications · 14 citations

    1

    h-index

  5. 1

    h-index

1–5