Assertion Synthesis

Assertion Synthesis is a formal method in assertion-based verification that automatically generates logical assertions characterizing intended behavioral properties of a system, distinguished from related assertion derivation techniques by its emphasis on constructing comprehensive and contextually relevant specifications from system models or execution traces.

16

Publications

905

Citations

30

Authors

16

Institutions

Publications per year

2017–2026

2

Authors

30

  1. BW
    Ben Wegbreit

    Palo Alto Research Center, United States

    2 publications · 220 citations

    2

    h-index

  2. PC
    Patrick Cousot

    École Normale Supérieure - PSL, France

    2 publications · 139 citations

    2

    h-index

  3. MS
    Mihaela Sighireanu

    Université Paris Cité, France

    2 publications · 40 citations

    2

    h-index

  4. RC
    Radhia Cousot

    École Polytechnique, France

    2 publications · 139 citations

    2

    h-index

  5. SK
    Sunil K. Sarin

    Xerox (United States), United States

    2 publications · 69 citations

    2

    h-index

1–5 of 30

Venues

  1. ACM SIGPLAN Notices

    2 publications · 57 citations

    2

    h-index

  2. Conference on Automated Deduction

    Conference · 1 publications · 17 citations

    1

    h-index

  3. 1

    h-index

  4. IEEE Transactions on Software Engineering

    TSE · 1 publications · 84 citations

    1

    h-index

  5. Communications of the ACM

    1 publications · 136 citations

    1

    h-index

1–5