J.L. van Meerbergen - Concepedia

Author

J.L. van Meerbergen

Also Known As

J. L. Van Meerbergen, J. L. van Meerbergen, J. Meerbergen, J.L. Van Meerbergen, J.L. van Meerbergen, Jef L. van Meerbergen, Jef Meerbergen, Jef van Meerbergen

Publications

1.3K

Citations

H-Index

Concepts

All Affiliations

Philips (Netherlands)Eindhoven University of Technology Philips (Finland)KU Leuven IMEC

About

J.L. van Meerbergen is an author at Philips (Netherlands) specializing in engineering, computer engineering, and computer architecture.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	19	26	1.2K
2	Computer Engineering	18	25	1.1K
3	Computer Science	17	21	942
4	Social Sciences	1	1	20
5	Applied Physics	1	1	102

J.L. van Meerbergen

Publications

1.2K

Citations

H-Index

Page 1

	Year	Citations
Architecture-driven synthesis techniques for VLSI implementation of DSP algorithms H. De Man, Francky Catthoor, Gert Goossens, Proceedings of the IEEE EngineeringComputer ArchitectureSystem-level DesignEmbedded SystemsProcessor Architecture	1990	135
PHIDEO: a silicon compiler for high speed algorithms P.E.R. Lippens, J.L. van Meerbergen, A. van der Werf, European Design Automation Conference Memory OptimisationEngineeringCompiler TechnologyComputer ArchitectureProcessor Architecture	1991	105
Measurement of the minority-carrier transport parameters in heavily doped silicon R. Mertens, J.L. van Meerbergen, J. Nijs, IEEE Transactions on Electron Devices Minority-carrier Transport ParametersWide-bandgap SemiconductorEngineeringDiffusion LengthSilicon On Insulator	1980	102
PHIDEO: a silicon compiler for high speed algorithms P.E.R. Lippens, J.L. van Meerbergen, A. van der Werf, Memory OptimisationEngineeringCompiler TechnologyComputer ArchitectureSystem-level Design	2002	87
Allocation of multiport memories for hierarchical data streams P.E.R. Lippens, J.L. van Meerbergen, Wim Verhaegh, International Conference on Computer Aided Design EngineeringComputer ArchitectureBackground Memory AllocationMulti-channel Memory ArchitectureMultiport Memories	1993	85
An FPGA architecture with enhanced datapath functionality K. Leijten-Nowak, J.L. van Meerbergen Hardware SecurityEngineeringIntrinsic CostHardware AccelerationProgram Analysis	2003	65
Improved force-directed scheduling in high-throughput digital signal processing Wim Verhaegh, P.E.R. Lippens, Emile Aarts, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems EngineeringReal-time System DesignComputer ArchitectureHardware SystemsImproved Force-directed Scheduling	1995	59
Allocation of multiport memories for hierarchical data streams P.E.R. Lippens, J.L. van Meerbergen, Wim Verhaegh, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD) EngineeringComputer ArchitectureBackground Memory AllocationMulti-channel Memory ArchitectureMultiport Memories	2002	59
Conflict modelling and instruction scheduling in code generation for in-house DSP cores A.H. Timmer, M. Strik, J.L. van Meerbergen, EngineeringConflict ModellingCompiler TechnologyArticle Conflict ModellingComputer Architecture	1995	48
Architectural strategies for an application-specific synchronous multiprocessor environment Francky Catthoor, Jan M. Rabaey, Gert Goossens, IEEE Transactions on Acoustics Speech and Signal Processing Heterogeneous ComputingInherent ParallelismEngineeringHardware AlgorithmComputer Architecture	1988	48

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