Ah-Lyan Yee

A 6.25-Gb/s binary transceiver in 0.13-/spl mu/m CMOS for serial data transmission across high loss legacy backplane channels

Robert Payne, P. Landman, B. Bhakta et al. · IEEE Journal of Solid-State Circuits · 2005 · 102 citations

Engineering, Vlsi Design, Speculative Techniques +15

A 6.25Gb/s binary adaptive DFE with first post-cursor tap cancellation for serial backplane communications

Robert Payne, B. Bhakta, S. Ramaswamy et al. · 2005 · 46 citations

Engineering, Vlsi Design, Mixed-signal Integrated Circuit +8

High-performance BiCMOS 100 K-gate array

J. Gallia, Ah-Lyan Yee, K.K. Chau et al. · IEEE Journal of Solid-State Circuits · 1990 · 41 citations

Electrical Engineering, Engineering, Vlsi Design +12

A 0.5-3.5 Gb/s low-power low-jitter serial data CMOS transceiver

Runqi Gu, James Tran, Heng-Chih Lin et al. · 2003 · 21 citations

Low-power Electronics, Electrical Engineering, Engineering +9

A 62Gb/s backplane interconnect ASIC based on 3.1Gb/s serial-link technology

P. Landman, Ah-Lyan Yee, Runqi Gu et al. · 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) · 2003 · 20 citations

System On Chip, Electrical Engineering, Backplane Interconnect Asic +12