A 6.25Gb/s binary adaptive DFE with first post-cursor tap cancellation for serial backplane communications

Abstract

A 6.25 Gb/s serial receiver with a 4-tap adaptive DFE is implemented in a 0.13 /spl mu/m 7LM CMOS process. Direct cancellation of the first post-cursor ISI is achieved, enabling recovery of a data eye fully closed from channel losses and crosstalk. A BER<10/sup -15/ is measured over legacy backplane channels.