Yung-Fa Chou

A built-in self-test scheme for the post-bond test of TSVs in 3D ICs

Yu-Jen Huang, Jin-Fu Li, Ji-Jan Chen et al. · 2011 · 72 citations

Bist Scheme, Engineering, Vlsi Design +21

Performance Characterization of TSV in 3D IC via Sensitivity Analysis

Jhih-Wei You, Shi‐Yu Huang, Ding-Ming Kwai et al. · 2010 · 65 citations

Engineering, Vlsi Design, Oscillation Ring +17

Small delay testing for TSVs in 3-D ICs

Shi‐Yu Huang, Yu-Hsiang Lin, Kun-Han Tsai et al. · 2012 · 59 citations

Small Delay, Electrical Engineering, Output Inverter +13

Flash memory built-in self-test using March-like algorithms

Jen-Chieh Yeh, Chi-Feng Wu, Kuo-Liang Cheng et al. · 2003 · 54 citations

Non-volatile Memory, Engineering, Mem Testing +16

Parametric Delay Test of Post-Bond Through-Silicon Vias in 3-D ICs via Variable Output Thresholding Analysis

Yu-Hsiang Lin, Shi‐Yu Huang, Kun-Han Tsai et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2013 · 42 citations

Fault Diagnosis, Engineering, Silicon On Insulator +22