Concepedia

Syed Muhammad Yasser Sherazi

SM

Statistics

Publications

4

Citations

78

H-Index

4

Active since

2016

Affiliations

IMEC(Current)

Syed Muhammad Yasser Sherazi is an author at IMEC specializing in electrical engineering, engineering, and very-large-scale integration layout.

Publications per year

2016–2019

4

Publications

4

Standard-cell design architecture options below 5nm node: The ultimate scaling of FinFET and Nanosheet

Syed Muhammad Yasser Sherazi, M. Cupak, Pieter Weckx et al. · 2019 · 22 citations

Engineering, Computer Engineering, Electrical Engineering +15

Architectural strategies in standard-cell design for the 7 nm and beyond technology node

Syed Muhammad Yasser Sherazi, Bharani Chava, Peter Debacker et al. · Journal of Micro/Nanolithography MEMS and MOEMS · 2016 · 20 citations

Engineering, Electrical Engineering, Low-power Design +16

DTCO exploration for efficient standard cell power rails

Peter Debacker, Julien Ryckaert, Diederik Verkest et al. · 2018 · 19 citations

Engineering, Computer Engineering, Electrical Engineering +12

CFET standard-cell design down to 3Track height for node 3nm and below

Syed Muhammad Yasser Sherazi, Jung Kyu Chae, Peter Debacker et al. · 2019 · 17 citations

Engineering, Electrical Engineering, Low-power Design +16

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