Aravind Dasu - Concepedia

Author

Aravind Dasu

Also Known As

A. Dasu, A.R. Dasu, ARAVIND DASU, Aravind Dasu, Aravind R. Dasu, Dasu, Aravind, Dasu, Aravind; Mathias, Dean; Liu, Chenguang; Christensen, Randy; Christensen, Bruce, Guopeng Liu

Publications

473

Citations

H-Index

Concepts

All Affiliations

Arizona State University Intel (United States)Intel (United Kingdom)Georgia Institute of Technology Utah State University

About

Aravind Dasu is an author at Arizona State University specializing in engineering, computer engineering, and computer architecture.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	11	12	314
2	Computer Engineering	11	12	314
3	Computer Science	9	9	230
4	Electrical Engineering	1	1	33
5	Space Engineering	1	1	34

Aravind Dasu

Publications

337

Citations

H-Index

Page 1

	Year	Citations
Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, EngineeringMachine LearningAdvanced ComputingSmart Web SearchComputer Architecture	2019	56
A survey of media processing approaches Aravind Dasu, S. Panchanathan IEEE Transactions on Circuits and Systems for Video Technology Multimedia ProcessingImage AnalysisEngineeringMultimedia Signal ProcessingMultimedia Database	2002	44
Automatic Compiler Based FPGA Accelerator for CNN Training Shreyas Kolala Venkataramanaiah, Yufei Ma, Shihui Yin, Hardware SecurityEngineeringHardware AccelerationGx FpgaHardware Algorithm	2019	40
Dynamically reconfigurable systolic array accelerators: a case study with extended Kalman filter and discrete wavelet transform algorithms Arvind Sudarsanam, R. D. Barnes, Jeff Carver, IET Computers & Digital Techniques EngineeringDiscrete Wavelet TransformHardware AlgorithmComputer ArchitectureEmbedded Systems	2010	34
Monolithic Integration of a Micropin-Fin Heat Sink in a 28-nm FPGA Thomas E. Sarvey, Yang Zhang, Colman Cheung, IEEE Transactions on Components Packaging and Manufacturing Technology EngineeringVlsi DesignDevice IntegrationMicrofluidic CoolingComputer Architecture	2017	33
In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC Eriko Nurvitadhi, Jeffrey Cook, Asit Mishra,	2018	23
FPGA-based low-batch training accelerator for modern CNNs featuring high bandwidth memory Shreyas Kolala Venkataramanaiah, Han-Sok Suh, Shihui Yin, Convolutional Neural NetworkEngineeringMachine LearningHardware AccelerationSparse Neural Network	2020	21
PRR-PRR Dynamic Relocation Arvind Sudarsanam, Ramachandra Kallam, Aravind Dasu IEEE Computer Architecture Letters EngineeringComputer ArchitectureDynamic EnvironmentPrr-prr Dynamic RelocationHardware Architecture	2009	20
Microfluidic Cooling of a 14-nm 2.5-D FPGA With 3-D Printed Manifolds for High-Density Computing: Design Considerations, Fabrication, and Electrical Characterization Thomas E. Sarvey, Ankit Kaul, Sreejith Kochupurackal Rajan, IEEE Transactions on Components Packaging and Manufacturing Technology EngineeringLiquid Metal CoolingMicrofluidic CoolingComputer ArchitectureIntegrated Circuits	2019	17
Specializing FGPU for Persistent Deep Learning Rui Ma, Derek Chiou, Jia-Ching Hsu, EngineeringMachine LearningComputer ArchitectureGpu ComputingHardware Security	2019	15

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