A. Ho

Equalization and clock recovery for a 2.5-10-Gb/s 2-PAM/4-PAM backplane transceiver cell

Jared Zerbe, C. Werner, Vladimir Stojanović et al. · IEEE Journal of Solid-State Circuits · 2003 · 228 citations

Hardware Security, Engineering, Analog-to-digital Converter +9

Autonomous dual-mode (PAM2/4) serial link transceiver with adaptive equalization and data recovery

Vladimir Stojanović, A. Ho, B.W. Garlepp et al. · IEEE Journal of Solid-State Circuits · 2005 · 149 citations

Serial Link Transceiver, Engineering, Pam4 System +12

Adaptive equalization and data recovery in a dual-mode (PAM2/4) serial link transceiver

Vladimir Stojanović, A. Ho, B.W. Garlepp et al. · 2004 · 60 citations

Transceiver Chip, Wireless Communications, Multi-carrier Communication +13

A 7.5Gb/s 10-Tap DFE Receiver with First Tap Partial Response, Spectrally Gated Adaptation, and 2nd-Order Data-Filtered CDR

Brian Leibowitz, Jade Kizer, Haechang Lee et al. · 2007 · 53 citations

Spectrally Gated Adaptation, Engineering, Equalization Updates +11

Equalization and clock recovery for a 2.5-10Gb/s 2-PAM/4-PAM backplane transceiver cell

Jared Zerbe, C. Werner, Vladimir Stojanović et al. · 2003 · 29 citations

High Speed Connectors, 5-Tap Rx Equalizer, Clock Recovery +4