Young-Ho Kwak - Concepedia

Author

Young-Ho Kwak

Korea University

Also Known As

Y.-H. Kwak, Young-Ho Kwak, Youngkuk Kwak

Publications

216

Citations

H-Index

Concepts

All Affiliations

Korea University

About

Young-Ho Kwak is an author at Korea University specializing in computer engineering, engineering, and computer architecture.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	6	6	160
2	Computer Engineering	6	6	160
3	Electrical Engineering	3	3	109
4	Systems Engineering	1	1	65
5	Asynchronous Circuits	1	1	65

Young-Ho Kwak

Publications

200

Citations

H-Index

Page 1

	Year	Citations
A 120-MHz–1.8-GHz CMOS DLL-Based Clock Generator for Dynamic Frequency Scaling Jihun Kim, Young-Ho Kwak, Moonil Kim, IEEE Journal of Solid-State Circuits EngineeringClock SignalsComputer ArchitectureDynamic Frequency ScalingClock Generator	2006	65
A 1.62 Gb/s–2.7 Gb/s Referenceless Transceiver for DisplayPort v1.1a With Weighted Phase and Frequency Detection Junyoung Song, Inhwa Jung, Minyoung Song, IEEE Transactions on Circuits and Systems I Regular Papers	2012	30
A $\hbox{Gb/s}+$ Slew-Rate/Impedance-Controlled Output Driver With Single-Cycle Compensation Time Young-Ho Kwak, Inhwa Jung, Chulwoo Kim IEEE Transactions on Circuits & Systems II Express Briefs Low-power ElectronicsEngineeringVlsi DesignData ConverterMixed-signal Integrated Circuit	2010	26
A One-Cycle Lock Time Slew-Rate-Controlled Output Driver Young-Ho Kwak, Inhwa Jung, Hyungdong Lee, EngineeringVlsi DesignComputer ArchitectureOutput DriverIntegrated Circuits	2007	24
A 3.5 GHz Spread-Spectrum Clock Generator With a Memoryless Newton-Raphson Modulation Profile Sewook Hwang, Minyoung Song, Young-Ho Kwak, IEEE Journal of Solid-State Circuits Electrical EngineeringSpread SpectrumEngineeringRadio FrequencyHigh-frequency Device	2012	20
A CMOS DLL-based 120MHz to 1.8GHz clock generator for dynamic frequency scaling Jin-Han Kim, Young-Ho Kwak, Seok-Ryung Yoon, Dynamic FrequencyEngineeringVlsi DesignClock SignalsHigh-frequency Device	2005	13
250 Mbps–5 Gbps Wide-Range CDR With Digital Vernier Phase Shifting and Dual-Mode Control in 0.13 $\mu$m CMOS Sang‐Yoon Lee, Hyung-Rok Lee, Young-Ho Kwak, IEEE Journal of Solid-State Circuits Vernier Phase ShifterEngineeringData ConverterMulti-port Serial LinkAnalog Design	2011	12
A 20 Gb/s Clock and Data Recovery With a Ping-Pong Delay Line for Unlimited Phase Shifting in 65 nm CMOS Process Young-Ho Kwak, Yongtae Kim, Sewook Hwang, IEEE Transactions on Circuits and Systems I Regular Papers	2013	10

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