Endostatin Blocks Vascular Endothelial Growth Factor-mediated Signaling via Direct Interaction with KDR/Flk-1

Young Mi Kim, Sewook Hwang, Young-Myoeng Kim, +5

Journal of Biological Chemistry

ImmunologyP38 MapkInflammationAngiogenesisCollagen Xviii +14

A 0.008 ${\hbox {mm}}^{2}$ 500 $\mu{\rm W}$ 469 kS/s Frequency-to-Digital Converter Based CMOS Temperature Sensor With Process Variation Compensation

Sewook Hwang, Jabeom Koo, Ki-Soo Kim, +2

IEEE Transactions on Circuits and Systems I Regular Papers

EngineeringTemperature SensorMeasurementEducationProcess Variation Compensation +18

34.1 An 8960-Element Ultrasound-on-Chip for Point-of-Care Ultrasound

N. Sánchez, Kailiang Chen, Chao Chen, +14

Medical UltrasoundMedical ElectronicsEngineeringBiomedical EngineeringPower Ultrasound +18

A 1.62 Gb/s–2.7 Gb/s Referenceless Transceiver for DisplayPort v1.1a With Weighted Phase and Frequency Detection

Junyoung Song, Inhwa Jung, Minyoung Song, +3

IEEE Transactions on Circuits and Systems I Regular Papers

A 1-V 10-Gb/s/pin Single-Ended Transceiver With Controllable Active-Inductor-Based Driver and Adaptively Calibrated Cascaded-Equalizer for Post-LPDDR4 Interfaces

Junyoung Song, Sewook Hwang, Hyun-Woo Lee, +1

IEEE Transactions on Circuits and Systems I Regular Papers

Data ConverterMixed-signal Integrated CircuitAnalog DesignChannel EqualizationComputer Engineering +7

A 3.5 GHz Spread-Spectrum Clock Generator With a Memoryless Newton-Raphson Modulation Profile

Sewook Hwang, Minyoung Song, Young-Ho Kwak, +2

IEEE Journal of Solid-State Circuits

Electrical EngineeringSpread SpectrumEngineeringRadio FrequencyHigh-frequency Device +10

A Self-Calibrated DLL-Based Clock Generator for an Energy-Aware EISC Processor

Sewook Hwang, Kyeong Min Kim, Jungmoon Kim, +2

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Energy-aware Eisc ProcessorElectrical EngineeringEngineeringVlsi DesignEnergy Efficiency +12

17.6 1V 10Gb/s/pin single-ended transceiver with controllable active-inductor-based driver and adaptively calibrated cascade-DFE for post-LPDDR4 interfaces

Junyoung Song, Hyun-Woo Lee, Jayoung Kim, +2

Electrical EngineeringEngineeringVlsi DesignVlsi ArchitectureMixed-signal Integrated Circuit +11

An 11.2-Gb/s LVDS Receiver With a Wide Input Range Comparator

Kyeong Min Kim, Sewook Hwang, Junyoung Song, +1

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

11.2-Gb/s Lvds ReceiverEvent CameraEngineeringData ConverterImage Sensors +6

A 1.62–5.4-Gb/s Receiver for DisplayPort Version 1.2a With Adaptive Equalization and Referenceless Frequency Acquisition Techniques

Sewook Hwang, Junyoung Song, Yeonho Lee, +1

IEEE Transactions on Circuits and Systems I Regular Papers

Clock RecoveryData ConverterMixed-signal Integrated CircuitChannel EqualizationComputer Engineering +8