Normalization of non-standard words

Richard Sproat, Alan W. Black, Stanley Chen, +3

Computer Speech & Language

Applied LinguisticsNatural Language ProcessingNon-standard WordsText NormalizationEngineering +7

A 112-Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR ADC and Inverter-Based RX Analog Front-End in 7-nm FinFET

Jay Im, Kevin Zheng, Chuen-Huei Adam Chou, +18

IEEE Journal of Solid-State Circuits

7-Nm Finfet CmosClock RecoveryData ConverterMixed-signal Integrated CircuitAnalog Design +4

Bidirectional recurrent neural network language models for automatic speech recognition

Ebru Arısoy, Abhinav Sethy, Bhuvana Ramabhadran, +1

Bidirectional RnnsMachine LearningEngineeringLstm Neural NetworksSpoken Language Processing +18

6.1 A 112Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR-ADC and Inverter-Based RX Analog Front-End in 7nm FinFET

Jay Im, Kevin Zheng, Adam Chou, +18

EngineeringVlsi DesignClock RecoveryData CenterMixed-signal Integrated Circuit +6

A 4-to-16GHz inverter-based injection-locked quadrature clock generator with phase interpolators for multi-standard I/Os in 7nm FinFET

Stanley Chen, Lei Zhou, Zhuang Ian, +7

A 40-to-56 Gb/s PAM-4 Receiver With Ten-Tap Direct Decision-Feedback Equalization in 16-nm FinFET

Jay Im, Freitas Dave, Arianne Roldan, +14

IEEE Journal of Solid-State Circuits

Dfe TapElectrical EngineeringEngineeringVlsi DesignMixed-signal Integrated Circuit +6

2.8 A pulse-position-modulation phase-noise-reduction technique for a 2-to-16GHz injection-locked ring oscillator in 20nm CMOS

Jun‐Chau Chien, Parag Upadhyaya, Howard Jung, +5

Hardware SecurityEngineeringVlsi DesignOscillatorsHigh-frequency Device +10

6.3 A 40-to-56Gb/s PAM-4 receiver with 10-tap direct decision-feedback equalization in 16nm FinFET

Jay Im, Freitas Dave, Arianne Roldan, +14

MultiplexingChannel CharacterizationTx Feed-forward EqualizationComputer EngineeringPam-4 Signaling +5

3.3 A 0.5-to-32.75Gb/s flexible-reach wireline transceiver in 20nm CMOS

Parag Upadhyaya, Jafar Savoj, Fu-Tai An, +13

Electrical EngineeringEngineeringVlsi DesignVlsi ArchitectureComputer Engineering +10

A wide common-mode fully-adaptive multi-standard 12.5Gb/s backplane transceiver in 28nm CMOS

Jafar Savoj, Kenny Hsieh, Parag Upadhyaya, +13

5-Tap Speculative DfeEngineeringVlsi DesignClock RecoveryMixed-signal Integrated Circuit +7