Chung-Hsun Lin - Concepedia

Author

Chung-Hsun Lin

University of California, Berkeley

Also Known As

Chung-Hsun Lin, Chung-hsun Lin

Publications

762

Citations

H-Index

Concepts

All Affiliations

University of California, Berkeley IBM Research - Thomas J. Watson Research Center Taiwan Semiconductor Manufacturing Company (Taiwan)Texas Instruments (United States)Hong Kong University of Science and Technology

About

Chung-Hsun Lin is an author at University of California, Berkeley specializing in engineering, electrical engineering, and device modeling.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	12	12	620
2	Computer Engineering	8	8	190
3	Applied Physics	5	5	430
4	Computer Science	2	2	43
5	Social Sciences	1	1	25

Chung-Hsun Lin

Publications

646

Citations

H-Index

Page 1

	Year	Citations
Ultrathin ferroic HfO2–ZrO2 superlattice gate stack for advanced transistors Suraj Cheema, Nirmaan Shanker, Li‐Chen Wang, Nature Oxide HeterostructuresElectrical EngineeringEngineeringFerroelectric ApplicationOxide Electronics	2022	320
BSIM-MG: A Versatile Multi-Gate FET Model for Mixed-Signal Design Mohan V. Dunga, Chung-Hsun Lin, Darsen D. Lu, Device ModelingMg-fet ModelElectrical EngineeringSemiconductor DeviceEngineering	2007	51
Modeling the floating-body effects of fully depleted, partially depleted, and body-grounded SOI MOSFETs Mansun Chan, Pin Su, Hui Wan, Solid-State Electronics Device ModelingBody-grounded Soi MosfetsElectrical EngineeringEngineeringBias Temperature Instability	2004	36
A Multi-Gate MOSFET Compact Model Featuring Independent-Gate Operation Darsen D. Lu, Mohan V. Dunga, Chung-Hsun Lin, Device ModelingElectrical EngineeringEngineeringVlsi DesignMulti-gate Mosfets	2007	35
Compact Modeling of Variation in FinFET SRAM Cells Darsen D. Lu, Chung-Hsun Lin, Ali M. Niknejad, IEEE Design & Test of Computers Device ModelingNon-volatile MemoryElectrical EngineeringEngineeringSram Stability	2010	32
Performance-Aware Corner Model for Design for Manufacturing Chung-Hsun Lin, Mohan V. Dunga, Darsen D. Lu, IEEE Transactions on Electron Devices Numerical AnalysisEngineeringAccelerated DesignSimulationComputer-aided Design	2009	25
Modeling of width-quantization-induced variations in logic FinFETs for 22nm and beyond Chung-Hsun Lin, Wilfried Haensch, Phil Oldiges, Symposium on VLSI Technology EngineeringVlsi DesignContinuous Width ScalingPhysical Design (Electronics)Nanoelectronics	2011	24
A non-charge-sheet based analytical model of undoped symmetric double-gate MOSFETs using SPP approach Jin He, Mansun Chan, Chung-Hsun Lin, Device ModelingElectrical EngineeringCircuit AnalysisEngineeringSemiconductor Device	2004	23
Design of FinFET SRAM Cells Using a Statistical Compact Model Darsen D. Lu, Chung-Hsun Lin, Shijing Yao, Device ModelingNon-volatile MemoryElectrical EngineeringPhysical Design (Electronics)Engineering	2009	21
Statistical Compact Modeling of Variations in Nano MOSFETs Chung-Hsun Lin, Mohan V. Dunga, Darsen D. Lu, EngineeringComputer ArchitectureComputer-aided DesignMc SimulationNanoelectronics	2008	18

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