Seok-Hun Hyun

Si FinFET based 10nm technology with multi Vt gate stack for low power and high performance applications

H.-J. Cho, Hwan Sool Oh, Kyunghoon Nam et al. · 2016 · 73 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 1.2 V 30 nm 3.2 Gb/s/pin 4 Gb DDR4 SDRAM With Dual-Error Detection and PVT-Tolerant Data-Fetch Scheme

Kyomin Sohn, Taesik Na, Indal Song et al. · IEEE Journal of Solid-State Circuits · 2012 · 55 citations

Engineering, Computer Engineering, Electrical Engineering +16

23.2 A 5Gb/s/pin 8Gb LPDDR4X SDRAM with power-isolated LVSTL and split-die architecture with 2-die ZQ calibration scheme

Chang‐Kyo Lee, Yoon-Joo Eom, Jin‐Hee Park et al. · 2017 · 44 citations

Engineering, Computer Engineering, Electrical Engineering +17

1.2V 1.6Gb/s 56nm 6F<sup>2</sup> 4Gb DDR3 SDRAM with hybrid-I/O sense amplifier and segmented sub-array architecture

Yongsam Moon, Yong-Ho Cho, Hyun-Bae Lee et al. · 2009 · 28 citations

Engineering, Computer Engineering, Computer Systems +17

Bulk-Si photonics technology for DRAM interface [Invited]

Hyunil Byun, J. K. Bok, Kwansik Cho et al. · Photonics Research · 2014 · 27 citations

Engineering, Electrical Engineering, Materials Science +17