Won-Jun Choi

18.1 A 20nm 9Gb/s/pin 8Gb GDDR5 DRAM with an NBTI monitor, jitter reduction techniques and improved power distribution

Hye-Yoon Joo, Seung-Jun Bae, Young‐Soo Sohn et al. · 2016 · 26 citations

Hardware Security, Wck Clock Receiver, Engineering +10

Hardware-in-the-loop simulation of DC microgrid with Multi-Agent System for emergency demand response

Cheol-Hee Yoo, Won-Jun Choi, Il‐Yop Chung et al. · 2012 · 23 citations

Distributed Energy System, Engineering, Power Grid Operation +18

A 16Gb LPDDR4X SDRAM with an NBTI-tolerant circuit solution, an SWD PMOS GIDL reduction technique, an adaptive gear-down scheme and a metastable-free DQS aligner in a 10nm class DRAM process

Ki Chul Chun, Yong-Gyu Chu, Jin‐Seok Heo et al. · 2018 · 23 citations

Non-volatile Memory, Engineering, Vlsi Design +23

A mechanically enhanced storage node for virtually unlimited height (MESH) capacitor aiming at sub 70nm DRAMs

D.H. Kim, J.Y. Kim, M. Huh et al. · 2004 · 19 citations

Engineering, Enhanced Storage Node, Unlimited Height +19