Jong-Kee Kwon - Concepedia

Author

Jong-Kee Kwon

Electronics and Telecommunications Research Institute

Also Known As

JONG-KEE KWON, Jong-Kee Kwon, Jong-kee Kwon, Jongkee Kwon

Publications

801

Citations

H-Index

Concepts

All Affiliations

Electronics and Telecommunications Research Institute Korea Advanced Institute of Science and Technology LG (South Korea)Hanyang University Samsung (South Korea)

About

Jong-Kee Kwon is an author at Electronics and Telecommunications Research Institute specializing in engineering, computer engineering, and microelectronics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	11	11	487
2	Computer Engineering	10	10	455
3	Electrical Engineering	5	5	206
4	Education	1	1	85
5	Analog System Engineering	1	1	52

Jong-Kee Kwon

Publications

694

Citations

H-Index

Page 1

	Year	Citations
A 0.9-V 60-$\mu{\hbox {W}}$ 1-Bit Fourth-Order Delta-Sigma Modulator With 83-dB Dynamic Range Jeongjin Roh, Sanho Byun, Youngkil Choi, IEEE Journal of Solid-State Circuits Positive Feedback83-Db Dynamic RangeAnalog-to-digital ConverterData ConverterMixed-signal Integrated Circuit	2008	167
A 550-$\mu\hbox{W}$ 10-b 40-MS/s SAR ADC With Multistep Addition-Only Digital Error Correction Sang-Hyun Cho, Chang‐Kyo Lee, Jong-Kee Kwon, IEEE Journal of Solid-State Circuits Capacitor DacEngineeringData ConverterMixed-signal Integrated CircuitAnalog Design	2011	104
A Low-Power, Wide-Dynamic-Range Semi-Digital Universal Sensor Readout Circuit Using Pulsewidth Modulation Julia Hsin-Lin Lu, Mac Inerowicz, Sanghoon Joo, IEEE Sensors Journal EngineeringMeasurementEducationSensor InterfaceSensor Technology	2010	85
A 10b 205MS/s 1mm2 90nm CMOS Pipeline ADC for Flat-Panel Display Applications Seung‐Chul Lee, Young-Deuk Jeon, Kwi-Dong Kim, Electrical EngineeringNoise ToneEngineeringData ConverterMixed-signal Integrated Circuit	2007	59
A 10-bit 205-MS/s 1.0-$\hbox{mm}^{2}$ 90-nm CMOS Pipeline ADC for Flat Panel Display Applications Seung‐Chul Lee, Young-Deuk Jeon, Jong-Kee Kwon, IEEE Journal of Solid-State Circuits EngineeringData ConverterMixed-signal Integrated CircuitAnalog DesignComputer Engineering	2007	53
A 9-bit 80 MS/s Successive Approximation Register Analog-to-Digital Converter With a Capacitor Reduction Technique Young‐Kyun Cho, Young-Deuk Jeon, Jae-Won Nam, IEEE Transactions on Circuits & Systems II Express Briefs EngineeringAnalog System EngineeringData ConverterMixed-signal Integrated CircuitAnalog Design	2010	52
A 4.7mW 0.32mm2 10b 30MS/s Pipelined ADC Without a Front-End S/H in 90nm CMOS Young-Deuk Jeon, Seung‐Chul Lee, Kwi-Dong Kim, Low-power ElectronicsFront-end S/hEngineeringPipelined AdcData Converter	2007	40
A 0.6-V Delta–Sigma Modulator With Subthreshold-Leakage Suppression Switches Hyungdong Roh, Hyoungjoong Kim, Youngkil Choi, IEEE Transactions on Circuits & Systems II Express Briefs Low-power ElectronicsElectrical EngineeringCore Chip SizeConventional SwitchesEngineering	2009	38
A Dual-Channel Pipelined ADC With Sub-ADC Based on Flash–SAR Architecture Young-Deuk Jeon, Jae-Won Nam, Kwi-Dong Kim, IEEE Transactions on Circuits & Systems II Express Briefs Data ConverterMixed-signal Integrated CircuitAnalog DesignDual-channel Pipelined AdcComputer Engineering	2012	17
A 550&#x00B5;W 10b 40MS/s SAR ADC with multistep addition-only digital error correction Sang-Hyun Cho, Chang‐Kyo Lee, Jong-Kee Kwon, RadarSar AdcEngineeringMsb DecisionCalibration	2010	17

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