2007 · 59 citations · 8 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsAnalog Integrated CircuitsCmos Circuit DesignLow-noise Circuit DesignLow-power Digital Circuit DesignMixed-signal Integrated Circuit DesignPower ManagementAnalog-to-digital Converter DesignCmos Analog Circuit DesignDisplay ApplicationsPower ConsumptionRegulator Design
A 10b 205MS/S 1mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ADC for flat-panel display applications is implemented in a 90nm CMOS process. The ADC with an LDO regulator achieves a 53dB PSRR for a 100MHz noise tone and a 55.2dB SNDR for a 30MHz 1V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">pp</sub> single-ended input at 205MS/S. The core ADC power consumption is 40mW from a 1V non-regulated supply.
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