H.-J. Park

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Publications

Citations

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Active since

2004

Affiliations

Pohang University of Science and Technology(Current)

H.-J. Park is an author at Pohang University of Science and Technology specializing in microelectronics, computer engineering, and electrical engineering.

Publications per year

2004–2006

Publications

A 66-333-MHz 12-mW register-controlled DLL with a single delay line and adaptive-duty-cycle clock dividers for production DDR SDRAMs

Young-Jin Jeon, Joong-Ho Lee, Hyun‐Chul Lee et al. · IEEE Journal of Solid-State Circuits · 2004 · 36 citations

Engineering, Computer Engineering, Electrical Engineering +14

A VCDL-based 60-760-MHz dual-loop DLL with infinite phase-shift capability and adaptive-bandwidth scheme

Seung-Jun Bae, Hyung‐Joon Chi, Young‐Soo Sohn et al. · IEEE Journal of Solid-State Circuits · 2005 · 25 citations

Engineering, Computer Engineering, Electrical Engineering +17

A Digital CMOS PWCL With Fixed-Delay Rising Edge and Digital Stability Control

Young‐Chan Jang, Jaehyun Bae, H.-J. Park · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 2006 · 15 citations

Engineering, Computer Engineering, Electrical Engineering +17

A Three-Data Differential Signaling Over Four Conductors With Pre-Emphasis and Equalization: A CMOS Current Mode Implementation

Seung Won Choi, H.-B. Lee, H.-J. Park · IEEE Journal of Solid-State Circuits · 2006 · 14 citations

Engineering, Computer Engineering, Electrical Engineering +17

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