Belliappa Kuttanna - Concepedia

Author

Belliappa Kuttanna

Intel (United States)

Also Known As

B. Kuttanna, Belliappa Kuttanna, Kuttanna, Belliappa

Publications

333

Citations

H-Index

Concepts

All Affiliations

Intel (United States)Motorola (United States)Intel (Germany)

About

Belliappa Kuttanna is an author at Intel (United States) specializing in computer engineering, engineering, and computer architecture.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	8	8	301
2	Computer Engineering	8	8	301
3	Electrical Engineering	5	5	237
4	Computer Science	3	3	64
5	Systems Engineering	2	2	46

Belliappa Kuttanna

Publications

317

Citations

H-Index

Page 1

	Year	Citations
Thermal management system for high performance PowerPC/sup TM/ microprocessors H. Sanchez, Belliappa Kuttanna, Thomas J. Olson, EngineeringEnergy EfficiencyComputer ArchitectureThermal Management SystemRefrigeration	2002	116
A Sub-1W to 2W Low-Power IA Processor for Mobile Internet Devices and Ultra-Mobile PCs in 45nm Hi-¿ Metal Gate CMOS Gianfranco Gerosa, Steve Curtis, M. D'Addeo, Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference EngineeringVlsi DesignComputer ArchitectureUltra-mobile PcsPower Optimization	2008	54
A Sub-2 W Low Power IA Processor for Mobile Internet Devices in 45 nm High-k Metal Gate CMOS G. Gerosa, S. Curtis, M. D'Addeo, IEEE Journal of Solid-State Circuits EngineeringVlsi DesignEnergy EfficiencyIdle PowerComputer Architecture	2009	43
Harmonia Guilherme Ottoni, Thomas Hartin, Christopher Weaver, Hardware SecurityHardware ArchitectureEngineeringBaseline QemuProgram Analysis	2011	27
Visual Inertial Odometry At the Edge: A Hardware-Software Co-design Approach for Ultra-low Latency and Power Dipan Kumar Mandal, Srivatsava Jandhyala, Om Ji Omer, EngineeringLocation EstimationHardware AlgorithmComputer ArchitecturePrecision Navigation	2019	19
A 3.0 W 75SPECint92 85SPECfp92 superscalar RISC microprocessor D. Pham, M. Alexander, A. Arizpe, EngineeringComputer ArchitecturePower OptimizationIntegrated CircuitsProcessor Architecture	2002	18
REDUCT: Keep it Close, Keep it Cool! : Efficient Scaling of DNN Inference on Multi-core CPUs with Near-Cache Compute Anant Nori, Rahul Bera, Shankar Balachandran,	2021	16
A sub 2W low power IA Processor for Mobile Internet Devices in 45nm Hi-K metal gate CMOS Gianfranco Gerosa, Steve Curtis, M. D'Addeo, Low-power ElectronicsMobile Internet DevicesElectrical EngineeringPower-aware ComputingEngineering	2008	14
A G3 PowerPC/sup TM/ superscalar low-power microprocessor A.R. Kennedy, M. Alexander, Eric Fiene, Low-power ElectronicsElectrical EngineeringPowerpc Processor ProductsData-side L1 CachesEngineering	2002	10

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