Giovanni Marzin - Concepedia

Author

Giovanni Marzin

Politecnico di Milano

Also Known As

Giovanni Marzin, Marzin, Giovanni

Publications

798

Citations

H-Index

Concepts

All Affiliations

Politecnico di Milano

About

Giovanni Marzin is an author at Politecnico di Milano specializing in computer engineering, engineering, and electrical engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Computer Engineering	8	8	733
2	Engineering	7	7	492
3	Electrical Engineering	3	3	207
4	Asynchronous Circuits	1	1	57
5	Computer Architecture	1	1	57

Giovanni Marzin

Publications

783

Citations

H-Index

Page 1

	Year	Citations
A 2.9–4.0-GHz Fractional-N Digital PLL With Bang-Bang Phase Detector and 560-${\rm fs}_{\rm rms}$ Integrated Jitter at 4.5-mW Power Davide Tasca, Marco Zanuso, Giovanni Marzin, IEEE Journal of Solid-State Circuits Total Absolute JitterRadio FrequencyAnalog-to-digital ConverterClock RecoveryData Converter	2011	241
An Adaptive Pre-Distortion Technique to Mitigate the DTC Nonlinearity in Digital PLLs Salvatore Levantino, Giovanni Marzin, Carlo Samori IEEE Journal of Solid-State Circuits Adaptive FilterEngineeringDigital PllsClock RecoveryData Converter	2014	139
A 20 Mb/s Phase Modulator Based on a 3.6 GHz Digital PLL With −36 dB EVM at 5 mW Power Giovanni Marzin, Salvatore Levantino, Carlo Samori, IEEE Journal of Solid-State Circuits Electrical EngineeringEngineering−36 Db EvmPhase ModulatorHigh-frequency Device	2012	106
A 2.9-to-4.0GHz fractional-N digital PLL with bang-bang phase detector and 560fs<inf>rms</inf> integrated jitter at 4.5mW power Davide Tasca, Marco Zanuso, Giovanni Marzin, Poor Jitter-power CompromiseFractional-n PllElectrical EngineeringEngineeringHigh-frequency Device	2011	88
21.1 A 1.7GHz MDLL-based fractional-N frequency synthesizer with 1.4ps RMS integrated jitter and 3mW power using a 1b TDC Giovanni Marucci, Andrea Fenaroli, Giovanni Marzin, Injection LockingEngineeringOscillatorsHigh-frequency DeviceClock Recovery	2014	59
A 1.7 GHz Fractional-N Frequency Synthesizer Based on a Multiplying Delay-Locked Loop Salvatore Levantino, Giovanni Marucci, Giovanni Marzin, IEEE Journal of Solid-State Circuits EngineeringFractional-order SystemHigh-frequency DeviceClock Frequency MultiplicationClock Recovery	2015	57
A Wideband Fractional-N PLL With Suppressed Charge-Pump Noise and Automatic Loop Filter Calibration Salvatore Levantino, Giovanni Marzin, Carlo Samori, IEEE Journal of Solid-State Circuits Wideband Fractional-n PllAnalog-to-digital ConverterData ConverterFilter (Signal Processing)Analog Design	2013	50
2.9 A Background calibration technique to control bandwidth in digital PLLs Giovanni Marzin, Salvatore Levantino, Carlo Samori, EngineeringDigital PllsClock RecoveryCalibrationMixed-signal Integrated Circuit	2014	30
A 20Mb/s phase modulator based on a 3.6GHz digital PLL with &#x2212;36dB EVM at 5mW power Giovanni Marzin, Salvatore Levantino, Carlo Samori, Low-power ElectronicsModulation ErrorElectrical EngineeringModulationEngineering	2012	13

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